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[83.9.2.151]) by smtp.gmail.com with ESMTPSA id f14-20020ac251ae000000b004db3eff4b12sm2203398lfk.171.2023.02.22.08.04.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 22 Feb 2023 08:04:46 -0800 (PST) Message-ID: Date: Wed, 22 Feb 2023 17:04:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH 08/11] ARM: dts: qcom: sdx55-t55: Enable PCIe RC support Content-Language: en-US To: Manivannan Sadhasivam , andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org References: <20230222153251.254492-1-manivannan.sadhasivam@linaro.org> <20230222153251.254492-9-manivannan.sadhasivam@linaro.org> From: Konrad Dybcio In-Reply-To: <20230222153251.254492-9-manivannan.sadhasivam@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 22.02.2023 16:32, Manivannan Sadhasivam wrote: > Enable PCIe RC support on Thundercomm T55 board. > > Signed-off-by: Manivannan Sadhasivam > --- > arch/arm/boot/dts/qcom-sdx55-t55.dts | 42 ++++++++++++++++++++++++++++ > 1 file changed, 42 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom-sdx55-t55.dts b/arch/arm/boot/dts/qcom-sdx55-t55.dts > index 7ed8feb99afb..fb5b9264077c 100644 > --- a/arch/arm/boot/dts/qcom-sdx55-t55.dts > +++ b/arch/arm/boot/dts/qcom-sdx55-t55.dts > @@ -242,6 +242,23 @@ &ipa { > memory-region = <&ipa_fw_mem>; > }; > > +&pcie_phy { > + status = "okay"; 'status' should go last. Since you're introducing new nodes, changing the order in the existing ones would be appreciated. > + > + vdda-phy-supply = <&vreg_l1e_bb_1p2>; > + vdda-pll-supply = <&vreg_l4e_bb_0p875>; > +}; > + > +&pcie_rc { > + status = "okay"; > + > + perst-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; > + wake-gpios = <&tlmm 53 GPIO_ACTIVE_HIGH>; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie_default>; property- property-names Konrad > +}; > + > &qpic_bam { > status = "ok"; > }; > @@ -265,6 +282,31 @@ &remoteproc_mpss { > memory-region = <&mpss_adsp_mem>; > }; > > +&tlmm { > + pcie_default: pcie-default-state { > + clkreq-pins { > + pins = "gpio56"; > + function = "pcie_clkreq"; > + drive-strength = <2>; > + bias-pull-up; > + }; > + > + perst-pins { > + pins = "gpio57"; > + function = "gpio"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + > + wake-pins { > + pins = "gpio53"; > + function = "gpio"; > + drive-strength = <2>; > + bias-pull-up; > + }; > + }; > +}; > + > &usb_hsphy { > status = "okay"; > vdda-pll-supply = <&vreg_l4e_bb_0p875>;