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From: Bjorn Andersson <andersson@kernel.org>
To: Jie Gan <jie.gan@oss.qualcomm.com>
Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	 Konrad Dybcio <konradybcio@kernel.org>,
	Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	 Tingwei Zhang <tingwei.zhang@oss.qualcomm.com>,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	 linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: dts: qcom: glymur: add coresight nodes
Date: Mon, 23 Mar 2026 09:03:11 -0500	[thread overview]
Message-ID: <acFGhpVWaHZtiyTq@baldur> (raw)
In-Reply-To: <f28fe058-d1b7-4d4f-8751-54117aba95f8@oss.qualcomm.com>

On Mon, Mar 23, 2026 at 09:27:41PM +0800, Jie Gan wrote:
> 
> 
> On 3/23/2026 9:02 PM, Konrad Dybcio wrote:
> > On 3/23/26 1:30 PM, Jie Gan wrote:
> > > 
> > > 
> > > On 3/23/2026 7:05 PM, Konrad Dybcio wrote:
> > > > On 3/18/26 12:42 PM, Jie Gan wrote:
> > > > > Add CoreSight nodes to enable trace paths like TPDM->ETF/STM->ETF.
> > > > > These devices are part of the AOSS, CDSP, QDSS, PCIe5, TraceNoc and
> > > > > some small subsystems, such as GCC, IPCC, PMU and so on.
> > > > > 
> > > > > Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> > > > > ---
> > > > > Changes in V2:
> > > > > 1. removed two cti devices due to GFX block is down
> > > > 
> > > > i.e. "because GPU is not yet enabled"?
> > > 
> > > Yeah, these CTI devices have clock issue for enabling due to the GPU block is not yet enabled.
> > 
> > Do they need the GPU to be online, or a clock from GPU_CC, or
> > maybe something else?
> 
> We need a specific debug clock inside the GPU block. The debug clock only
> can be enabled while GPU is online.

What happens once GPU has been delivered, but for some reason is
inactive and we try to use this CTI device?

> Also needs AOP to support enable/disable
> the debug clock.
> 

When you hit such dependencies, please write and contribute the patch
(in this case, you can do it in a separate patch/series).

Regards,
Bjorn

> > 
> > > > >      - cti@11c42000
> > > > >      - cti@11c4b000
> > > > > 2. changes two TPDM devices to static:
> > > > >      - tpdm-cdsp-cmsr
> > > > >      - tpdm-cdsp-cmsr2
> > > > 
> > > > They were TPDM instances in v1. What's the reason for the change?
> > > 
> > > These TPDMs havent clock source for accessing registers. We only need enable its ports to output trace data. So I have changed them to static-TPDM compatible.
> > 
> > The registers are clearly physically there. Are you saying that we
> > (currently?) can't enable the clock required to access them? Or is
> > there a design defect that's preventing us from doing so?
> 
> It's about hardware design. Some of the TPDM devices are designed as static,
> means we dont need access the register of the device for configuring. The
> trace data of the static TPDM is enabled by default, we only need enable the
> port of the connected TPDA device for receiving the data.
> 
> I have tested these devices with Jtag attached, so I didnt observe issue
> about these new devices in the CDSP block. (Jtag will provide debug
> capability for all debug devices) Also cross-checked with hardware team for
> confirming these devices are working as static.
> 
> Thanks,
> Jie
> 
> > 
> > Konrad
> > 
> 

  reply	other threads:[~2026-03-23 14:03 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-18 11:42 [PATCH v2] arm64: dts: qcom: glymur: add coresight nodes Jie Gan
2026-03-23 11:05 ` Konrad Dybcio
2026-03-23 12:30   ` Jie Gan
2026-03-23 13:02     ` Konrad Dybcio
2026-03-23 13:27       ` Jie Gan
2026-03-23 14:03         ` Bjorn Andersson [this message]
2026-03-23 14:09           ` Jie Gan
2026-03-23 14:12             ` Konrad Dybcio
2026-03-23 14:18               ` Jie Gan
2026-03-25  0:59               ` Jie Gan

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