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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2c10b2cde3bsm16982228eec.20.2026.03.24.20.41.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Mar 2026 20:41:04 -0700 (PDT) Date: Wed, 25 Mar 2026 11:40:59 +0800 From: Shawn Guo To: Deepti Jaggi Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prasad Sodagudi , Nikunj Kela , Shazad Hussain Subject: Re: [PATCH v5 2/3] arm64: dts: qcom: Introduce sa8255p SoC Message-ID: References: <20260304-b4-scmi-upstream-v5-0-f8fc763d8da0@oss.qualcomm.com> <20260304-b4-scmi-upstream-v5-2-f8fc763d8da0@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260304-b4-scmi-upstream-v5-2-f8fc763d8da0@oss.qualcomm.com> X-Authority-Analysis: v=2.4 cv=fOk0HJae c=1 sm=1 tr=0 ts=69c35952 cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=KKAkSRfTAAAA:8 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=TRUxsesqeu6M_UsrYMsA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 a=cvBusfyB2V15izCimMoJ:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: 4IM6Q_9dawDAhWfm0jG9Tcwe7Wu4J8Ob X-Proofpoint-ORIG-GUID: 4IM6Q_9dawDAhWfm0jG9Tcwe7Wu4J8Ob X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI1MDAyMyBTYWx0ZWRfXxJozKB3MUTOp wgI4Myqz2P/NZR/YK7six3Ht8TTVZeRiI8HiyQo2pFBqFoHqdRnYbeHh2CDQ9SKMC94zZHMHpfx LKolctJprCvw7TaCszGxi1rpHynPU9bHqx/DC1U6cS2uy/ycYu3/UuR+mdTS2iUBtHJekZUJpN8 EhouxDl6Kf0qwtdjNsvSR2ZOuW2p1Sb1LSMW2uPvnDNONKSVnLIu0SJff4vIKOAf2yhCDUlzKqx 3isCORL17zkrITSM32EiV5mNbtcPI7uxgH8FgkK20ra+g9Ev22TICjKAmJmK7tnL3WjUgs3ywI4 cgW/8DFIXGWo2IEw1l8shIODpPpGPvu4x5xRlqSQkty1xUqLxb8vLsudVbnmLk+hc/2OfLQw+eY MKFVLqzbVSDzcVlr0LMugGSA06CxtOEkXF8w/L7L020z8uPe5rcI4Nzp3cxWhcW9i4V+qyAH4Vq EOKaTt7UwFkhRVGuBHA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-25_01,2026-03-24_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 priorityscore=1501 clxscore=1015 adultscore=0 lowpriorityscore=0 phishscore=0 spamscore=0 suspectscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603250023 On Wed, Mar 04, 2026 at 08:28:29PM -0800, Deepti Jaggi wrote: > From: Nikunj Kela > > Introduce base device tree support for sa8255p Qualcomm's automotive > infotainment SoC. The base dt file describes core SoC components- CPUs, > CPU map, ipcc, QUP, geni UART, interrupt controller, TLMM, reserved > memory, SMMU, firmware scm, scmi, watchdog, SRAM, PSCI, ufs, pcie, pmu > nodes and enable booting to shell with ramdisk. > > The Qualcomm automotive sa8255p SoC utilizes firmware to configure > platform resources such as clocks, interconnects, and TLMM. Device drivers > request these resources through the SCMI power,reset and performance > protocols. Assign each device driver a dedicated SCMI channel and Tx/Rx > doorbells to support parallel resource requests and aggregation in the > SCMI platform server. Operate the SCMI server stack in an SMP-enabled VM, > using the Qualcomm SMC/HVC transport driver for communication. > > Group resource operations to improve abstraction and reduce the number of > SCMI requests. Follow the SCMI-based resource management approach > demonstrated by Qualcomm at LinaroConnect 2024.[1] > > Limit initial support to basic platform resources, serial console, ufs > and pcie.Defer enabling USB, and Ethernet to subsequent updates. > > [1]: https://resources.linaro.org/en/resource/wfnfEwBhRjLV1PEAJoDDte > > Co-developed-by: Shazad Hussain > Signed-off-by: Shazad Hussain > Signed-off-by: Nikunj Kela > Co-developed-by: Deepti Jaggi > Signed-off-by: Deepti Jaggi > --- > arch/arm64/boot/dts/qcom/sa8255p.dtsi | 4861 +++++++++++++++++++++++++++++++++ > 1 file changed, 4861 insertions(+) Is my understanding correct that the following SoCs are all members of Lemans family? - QCS9075/9100 (IQ9) - SA8255P - SA8775P If so, does it make sense to apply DTS structure like below? lemans.dtsi | |― lemans-iq9.dtsi | | | |― lemans-evk.dts (qcs9100-evk.dts ideally) | | | |― qcs9100-ride-r3.dts | | | |― qcs9100-ride.dts | |― lemans-sa8255p.dtsi | | | |― sa8255p-ride.dts | |― lemans-sa8775p.dtsi | |― sa8775p-ride-r3.dts | |― sa8775p-ride.dts Shawn