From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5C3015A8; Tue, 11 Mar 2025 10:01:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741687296; cv=none; b=NKnTFGc9aQ+SeVUV/L1B82edOwfvlzDyq1BsR1Frvb7tGqauJvVjU2gYlxuDugGBesUjKE7MmZqlpyDDMLAtEtc6ZB1a2aO1yRdi0sbZEXfvTXwhp78ZpDnbzd7JT8E5uvMCExXBXVwpLDRbqW283/jnu7YISxri88XPeByO7z0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741687296; c=relaxed/simple; bh=4N1q9GIgi+6Irm5ddc/TZanBPrU7mddBu7T6VRBTVRE=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=AFismx8Yt6/vqUL8G3uN6KGh31QMAgWnbgoX/HlRIEWk1HPTUU/IQEkud4nJF/lW+qTkvENSuhjfKRnZZIaEDLpRU9Tlw/4pjGqpQcqSP+gdF2XBEq7KLhW6Q+Mqq/ErtUrLNUI0HllCoCnomnnNi7GGN4SbhZBziZMYyeRZxxo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KF1CiMgi; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KF1CiMgi" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 93ACEC4CEE9; Tue, 11 Mar 2025 10:01:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741687296; bh=4N1q9GIgi+6Irm5ddc/TZanBPrU7mddBu7T6VRBTVRE=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=KF1CiMgiR0ImLestj6d0IPnkPovDOb5KgNQQnLiVsDPtWrZUENGFWe7O3BzYENwdm HXkACt81J4fTdM/YIo4rR0cygGH2XrNCNZGXvtMcScCkrPZb2oifRL6Eddlc+OCl8u lIXILIB4lDGtl5In5/5GGFf0yJ7dKYZr+oL3rjJmACRkJkYK8dx4XPmjZI0EfKl4hG 2AJoCZNkfiNlTu28iyBB0tkqllkntyaAWPjrIpEU3rpy8heqD5LtfgBz/NzOnPb89w pHdW97S+4sT82srbqIvrM/hwfsZnv4dYpF7dc/vRnqaBLDifoAXNRb2kfqqQdwMPfS ZVECb3yrMcvEA== Message-ID: Date: Tue, 11 Mar 2025 11:01:28 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/9] dt-bindings: x86: Add a binding for x86 wakeup mailbox To: Ricardo Neri Cc: Yunhong Jiang , tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, rafael@kernel.org, lenb@kernel.org, kirill.shutemov@linux.intel.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-acpi@vger.kernel.org, ricardo.neri@intel.com, ravi.v.shankar@intel.com References: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> <20240823232327.2408869-3-yunhong.jiang@linux.intel.com> <20240827204549.GA4545@yjiang5-mobl.amr.corp.intel.com> <20240910061227.GA76@yjiang5-mobl.amr.corp.intel.com> <1d0ba3fc-1504-4af3-a0bc-fba86abe41e8@kernel.org> <20240919191725.GA11928@yjiang5-mobl.amr.corp.intel.com> <874d5908-f1db-412f-96a2-83fcebe8dd98@kernel.org> <20250303222102.GA16733@ranerica-svr.sc.intel.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 03/03/2025 23:21, Ricardo Neri wrote: > On Fri, Sep 20, 2024 at 01:15:41PM +0200, Krzysztof Kozlowski wrote: > > [...] > >> enable-method is part of CPUs, so you probably should match the CPUs... >> I am not sure, I don't have the big picture here. >> >> Maybe if companies want to push more of bindings for purely virtual >> systems, then they should first get involved more, instead of relying on >> us. Provide reviews for your virtual stuff, provide guidance. There is >> resistance in accepting bindings for such cases for a reason - I don't >> even know what exactly is this and judging/reviewing based on my >> practices will no be accurate. > > Hi Krzysztof, > > I am taking over this work from Yunhong. > > First of all, I apologize for the late reply. I will make sure > communications are timely in the future. > > Our goal is to describe in the device tree a mechanism or artifact to boot > secondary CPUs. > > In our setup, the firmware puts secondary CPUs to monitor a memory location > (i.e., the wakeup mailbox) while spinning. From the boot CPU, the OS writes > in the mailbox the wakeup vector and the ID of the secondary CPU it wants > to boot. When a secondary CPU sees its own ID it will jump to the wakeup > vector. > > This is similar to the spin-table described in the Device Tree > specification. The key difference is that with the spin-table CPUs spin > until a non-zero value is written in `cpu-release-addr`. The wakeup mailbox > uses CPU IDs. > > You raised the issue of the lack of a `compatible` property, and the fact > that we are not describing an actual device. > > I took your suggestion of matching by node and I came up with the binding > below. I see these advantages in this approach: > > * I define a new node with a `compatible` property. > * There is precedent: the psci node. In the `cpus` node, each cpu@n has psci is a standard. If you are documenting here a standard, clearly express it and provide reference to the specification. > an `enable-method` property that specify `psci`. > * The mailbox is a device as it is located in a reserved memory region. > This true regardless of the device tree describing bare-metal or > virtualized machines. > > Thanks in advance for your feedback! > > Best, > Ricardo > > (only the relevant sections of the binding are shown for brevity) > > properties: > $nodename: > const: wakeup-mailbox > > compatible: > const: x86,wakeup-mailbox You need vendor prefix for this particular device. If I pointed out lack of device and specific compatible, then adding random compatible does not solve it. I understand it solves for you, but not from the bindings point of view. > > mailbox-addr: > $ref: /schemas/types.yaml#/definitions/uint64 So is this some sort of reserved memory? Mailbox needs mbox-cells, so maybe that's not mailbox. Best regards, Krzysztof