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From: Brian Masney <bmasney@redhat.com>
To: "Miquel Raynal (Schneider Electric)" <miquel.raynal@bootlin.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Thomas Gleixner <tglx@kernel.org>,
	Olivia Mackall <olivia@selenic.com>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	Jayesh Choudhary <j-choudhary@ti.com>,
	"David S. Miller" <davem@davemloft.net>,
	Christian Marangi <ansuelsmth@gmail.com>,
	Antoine Tenart <atenart@kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Pascal EBERHARD <pascal.eberhard@se.com>,
	Wolfram Sang <wsa+renesas@sang-engineering.com>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,
	Herve Codina <herve.codina@bootlin.com>
Subject: Re: [PATCH 10/16] clk: Add support for clock nexus dt bindings
Date: Mon, 30 Mar 2026 11:16:44 -0400	[thread overview]
Message-ID: <acqT3Dh03y3JiLLc@redhat.com> (raw)
In-Reply-To: <20260327-schneider-v7-0-rc1-crypto-v1-10-5e6ff7853994@bootlin.com>

On Fri, Mar 27, 2026 at 09:09:32PM +0100, Miquel Raynal (Schneider Electric) wrote:
> A nexus node is some kind of parent device abstracting the outer
> connections. They are particularly useful for describing connectors-like
> interfaces but not only. Certain IP blocks will typically include inner
> blocks and distribute resources to them.
> 
> In the case of clocks, there is already the concept of clock controller,
> but this usually indicates some kind of control over the said clock,
> ie. gate or rate control. When there is none of this, an existing
> approach is to reference the upper clock, which is wrong from a hardware
> point of view.
> 
> Nexus nodes are already part of the device-tree specification and clocks
> are already mentioned:
> https://github.com/devicetree-org/devicetree-specification/blob/v0.4/source/chapter2-devicetree-basics.rst#nexus-nodes-and-specifier-mapping
> 
> Following the introductions of nexus nodes support for interrupts, gpios
> and pwms, here is the same logic applied again to the clk subsystem,
> just by transitioning from of_parse_phandle_with_args() to
> of_parse_phandle_with_args_map():
> 
> * Nexus OF support:
> commit bd6f2fd5a1d5 ("of: Support parsing phandle argument lists through a nexus node")
> * GPIO adoption:
> commit c11e6f0f04db ("gpio: Support gpio nexus dt bindings")
> * PWM adoption:
> commit e71e46a6f19c ("pwm: Add support for pwm nexus dt bindings")
> 
> Expected Nexus properties supported:
> - clock-map: maps inner clocks to inlet clocks,
> - clock-map-mask: specifier cell(s) which will be remapped,
> - clock-map-pass-thru: specifier cell(s) not used for remapping,
>   forwarded as-is.
> 
> In my own usage I had to deal with controllers where clock-map-mask and
> clock-map-pass-thru were not relevant, but here is a made up example
> showing how all these properties could go together:
> 
> Example:
>     soc_clk: clock-controller {
>         #clock-cells = <2>;
>     };
> 
>     container: container {
>         #clock-cells = <2>;
>         clock-map = <0 0 &soc_clk 2 0>,
>                     <1 0 &soc_clk 6 0>;
>         clock-map-mask = <0xffffffff 0x0>;
>         clock-map-pass-thru = <0x0 0xffffffff>;
> 
>         child-device {
>             clocks = <&container 1 0>;
> 	    /* This is equivalent to <&soc_clk 6 0> */
>         };
>     };
> 
> The child device does not need to know about the outer implementation,
> and only knows about what the nexus provides. The nexus acts as a
> pass-through, with no extra control.
> 
> Signed-off-by: Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com>
> Reviewed-by: Herve Codina <herve.codina@bootlin.com>
> ---
>  drivers/clk/clk.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
> index 93e33ff30f3a..196ba727e84b 100644
> --- a/drivers/clk/clk.c
> +++ b/drivers/clk/clk.c
> @@ -5218,8 +5218,8 @@ static int of_parse_clkspec(const struct device_node *np, int index,
>  		 */
>  		if (name)
>  			index = of_property_match_string(np, "clock-names", name);
> -		ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells",
> -						 index, out_args);
> +		ret = of_parse_phandle_with_args_map(np, "clocks", "clock",
> +						     index, out_args);

Before I left my Reviewed-by, I should have double checked Sashiko. It
has several questions about this patch. The first is:

    Are there other places in the clock framework that need to transition to the
    new map API to ensure assigned clocks work?
    
    For instance, assigned-clocks and assigned-clock-parents are parsed in
    drivers/clk/clk-conf.c using of_parse_phandle_with_args(). If a device
    specifies an assigned clock that routes through a nexus node, will it fail
    to configure because the map is not traversed?

https://sashiko.dev/#/patchset/20260327-schneider-v7-0-rc1-crypto-v1-0-5e6ff7853994%40bootlin.com?patch=12563

Brian


  parent reply	other threads:[~2026-03-30 15:16 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-27 20:09 [PATCH 00/16] Add support for Inside-Secure EIP-150 crypto block Miquel Raynal (Schneider Electric)
2026-03-27 20:09 ` [PATCH 01/16] dt-bindings: clock: Introduce nexus nodes Miquel Raynal (Schneider Electric)
2026-03-27 20:09 ` [PATCH 02/16] dt-bindings: interrupt-controller: Describe EIP-201 AIC Miquel Raynal (Schneider Electric)
2026-03-27 20:09 ` [PATCH 03/16] dt-bindings: rng: Rename the title of the EIP-76 file Miquel Raynal (Schneider Electric)
2026-03-27 20:09 ` [PATCH 04/16] dt-bindings: crypto: eip28: Describe EIP-28 PKA Miquel Raynal (Schneider Electric)
2026-03-27 20:09 ` [PATCH 05/16] dt-bindings: bus: eip150: Describe the EIP-150 container node Miquel Raynal (Schneider Electric)
2026-03-27 20:09 ` [PATCH 06/16] clk: tests: Add clk_parse_clkspec() Kunit testing Miquel Raynal (Schneider Electric)
2026-03-30 14:48   ` Brian Masney
2026-04-01  8:59     ` Miquel Raynal
2026-04-01 13:55       ` Brian Masney
2026-03-27 20:09 ` [PATCH 07/16] clk: tests: Add Kunit testing for of_clk_get_parent_name() Miquel Raynal (Schneider Electric)
2026-03-27 20:09 ` [PATCH 08/16] clk: Improve a couple of comments Miquel Raynal (Schneider Electric)
2026-03-30 14:50   ` Brian Masney
2026-03-27 20:09 ` [PATCH 09/16] clk: Use the generic OF phandle parsing in only one place Miquel Raynal (Schneider Electric)
2026-03-30 15:01   ` Brian Masney
2026-04-01  8:49     ` Miquel Raynal
2026-03-27 20:09 ` [PATCH 10/16] clk: Add support for clock nexus dt bindings Miquel Raynal (Schneider Electric)
2026-03-30 15:09   ` Brian Masney
2026-03-30 15:16   ` Brian Masney [this message]
2026-04-01  8:47     ` Miquel Raynal
2026-04-01 14:04       ` Brian Masney
2026-03-27 20:09 ` [PATCH 11/16] clk: tests: Add Kunit testing for nexus nodes Miquel Raynal (Schneider Electric)
2026-03-27 20:09 ` [PATCH 12/16] irqchip/eip201-aic: Add support for Safexcel EIP-201 AIC Miquel Raynal (Schneider Electric)
2026-03-28 13:10   ` Thomas Gleixner
2026-04-01  9:10     ` Miquel Raynal
2026-03-27 20:09 ` [PATCH 13/16] hwrng: omap: Enable on Renesas RZ/N1D Miquel Raynal (Schneider Electric)
2026-03-27 20:09 ` [PATCH 14/16] crypto: Group Inside-Secure IPs together and align the titles Miquel Raynal (Schneider Electric)
2026-03-27 20:09 ` [PATCH 15/16] crypto: eip28: Add support for SafeXcel EIP-28 Public Key Accelerator Miquel Raynal (Schneider Electric)
2026-03-27 20:09 ` [PATCH 16/16] ARM: dts: renesas: r9a06g032: Describe the EIP-150 block Miquel Raynal (Schneider Electric)
2026-03-30 13:33 ` [PATCH 00/16] Add support for Inside-Secure EIP-150 crypto block Geert Uytterhoeven
2026-04-01  9:02   ` Miquel Raynal

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