public inbox for devicetree@vger.kernel.org
 help / color / mirror / Atom feed
From: Thierry Reding <thierry.reding@kernel.org>
To: Mikko Perttunen <mperttunen@nvidia.com>
Cc: "Thierry Reding" <thierry.reding@gmail.com>,
	"Uwe Kleine-König" <ukleinek@kernel.org>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	linux-pwm@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	"Yi-Wei Wang" <yiweiw@nvidia.com>
Subject: Re: [PATCH v4 2/7] pwm: tegra: Avoid hard-coded max clock frequency
Date: Tue, 31 Mar 2026 09:29:56 +0200	[thread overview]
Message-ID: <act37F08rdGGIcrY@orome> (raw)
In-Reply-To: <20260331-t264-pwm-v4-2-c041659677cf@nvidia.com>

[-- Attachment #1: Type: text/plain, Size: 743 bytes --]

On Tue, Mar 31, 2026 at 11:12:14AM +0900, Mikko Perttunen wrote:
> From: Yi-Wei Wang <yiweiw@nvidia.com>
> 
> The clock driving the Tegra PWM IP can be sourced from different parent
> clocks. Hence, let dev_pm_opp_set_rate() set the max clock rate based
> upon the current parent clock that can be specified via device-tree.
> 
> After this, the Tegra194 SoC data becomes redundant, so get rid of it.
> 
> Signed-off-by: Yi-Wei Wang <yiweiw@nvidia.com>
> Co-developed-by: Mikko Perttunen <mperttunen@nvidia.com>
> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
> ---
>  drivers/pwm/pwm-tegra.c | 16 +++-------------
>  1 file changed, 3 insertions(+), 13 deletions(-)

Reviewed-by: Thierry Reding <treding@nvidia.com>

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

  reply	other threads:[~2026-03-31  7:29 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-31  2:12 [PATCH v4 0/7] Tegra264 PWM support Mikko Perttunen
2026-03-31  2:12 ` [PATCH v4 1/7] dt-bindings: pwm: Document Tegra264 controller Mikko Perttunen
2026-03-31  2:12 ` [PATCH v4 2/7] pwm: tegra: Avoid hard-coded max clock frequency Mikko Perttunen
2026-03-31  7:29   ` Thierry Reding [this message]
2026-03-31  2:12 ` [PATCH v4 3/7] pwm: tegra: Modify read/write accessors for multi-register channel Mikko Perttunen
2026-03-31  2:12 ` [PATCH v4 4/7] pwm: tegra: Parametrize enable register offset Mikko Perttunen
2026-03-31  7:30   ` Thierry Reding
2026-03-31  2:12 ` [PATCH v4 5/7] pwm: tegra: Parametrize duty and scale field widths Mikko Perttunen
2026-03-31  2:12 ` [PATCH v4 6/7] pwm: tegra: Add support for Tegra264 Mikko Perttunen
2026-03-31  7:36   ` Thierry Reding
2026-03-31  2:12 ` [PATCH v4 7/7] arm64: tegra: Add PWM controllers on Tegra264 Mikko Perttunen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=act37F08rdGGIcrY@orome \
    --to=thierry.reding@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=jonathanh@nvidia.com \
    --cc=krzk+dt@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pwm@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=mperttunen@nvidia.com \
    --cc=robh@kernel.org \
    --cc=thierry.reding@gmail.com \
    --cc=ukleinek@kernel.org \
    --cc=yiweiw@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox