From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BDB223DEAFD for ; Wed, 1 Apr 2026 10:14:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775038442; cv=none; b=HV9Qbhmb2RD2UZzaigbnN73yjyI3ffsp6BAkMtxCqETZbzz+Lq1e/mUI6Gkn/HFCuUgXoVlwjtPjcPhfBZKbjlxXEqmiV/kZLPnrDUR2kxP4IeouQKaAvJJ98S+B1Fh1GxF4wicOIJM2q5lbFQ0Kysc1XQMBC5xKw49NoGRAcOE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775038442; c=relaxed/simple; bh=ibTH3sWjZiLJtyCy3tNu+QfkvXCL/kQDVncyZ3rCsCs=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=HKXNA6Yua23jagi4K3Sp0EjBG0z6Dn/HyNH+6oBVoucDnjptBr0yVGBh7kAmfXZ9GTVBPJL26YLnAuE3ZkrTT7GM0rS79SdtV1IgiwbkqBHcEmn6XjUa7PuweQ4TgY3TWFSueSZiNIfserqZpCMMpICXYslIihTBS23O7xSXodE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=keMaUsDw; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="keMaUsDw" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1266C1C14 for ; Wed, 1 Apr 2026 03:13:54 -0700 (PDT) Received: from [192.168.0.1] (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B31C63F915 for ; Wed, 1 Apr 2026 03:13:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1775038439; bh=ibTH3sWjZiLJtyCy3tNu+QfkvXCL/kQDVncyZ3rCsCs=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=keMaUsDwSyCsJ8t7qMaX9d029nGBt7eri1GEIaiU8QlrpCk8Zt8eKg5uHU5U2q5Tx KLBHyMrGCIldkB8UGigCjgMC7lDucok+0Y2HsLo5LFzZGOsCnxUQhdXWQHecpNo3vp SAdZlk0+eYkdPAeGlBCEJ4KoDA1txXO0I2yHUfcw= Date: Wed, 1 Apr 2026 11:13:37 +0100 From: Liviu Dudau To: Guangliu Ding Cc: "Daniel Baluta (OSS)" , Daniel Almeida , Alice Ryhl , Boris Brezillon , Steven Price , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , "dri-devel@lists.freedesktop.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "imx@lists.linux.dev" , "linux-arm-kernel@lists.infradead.org" , Jiyu Yang Subject: Re: Re: [PATCH 1/2] dt-bindings: gpu: mali-valhall-csf: Document i.MX952 support Message-ID: References: <20260331-master-v1-0-65c8e318d462@nxp.com> <20260331-master-v1-1-65c8e318d462@nxp.com> <99a1da55-d6e5-4d11-abaa-8c85283ab5f2@oss.nxp.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Wed, Apr 01, 2026 at 09:43:12AM +0000, Guangliu Ding wrote: > Hi Daniel > > > On 4/1/26 11:48, Guangliu Ding wrote: > > > [You don't often get email from guangliu.ding@nxp.com. Learn why this > > > is important at https://aka.ms/LearnAboutSenderIdentification ] > > > > > > Hi Liviu > > > > > > Thanks for your review. Please refer to my comments below: > > > > > >> On Tue, Mar 31, 2026 at 06:12:38PM +0800, Guangliu Ding wrote: > > >>> Add compatible string of Mali G310 GPU on i.MX952 board. > > >>> > > >>> Signed-off-by: Guangliu Ding > > >>> Reviewed-by: Jiyu Yang > > >>> --- > > >>> Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml | 1 > > >>> + > > >>> 1 file changed, 1 insertion(+) > > >>> > > >>> diff --git > > >>> a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > > >> b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > > >>> index 8eccd4338a2b..6a10843a26e2 100644 > > >>> --- > > >>> a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > > >>> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yam > > >>> +++ l > > >>> @@ -20,6 +20,7 @@ properties: > > >>> - enum: > > >>> - mediatek,mt8196-mali > > >>> - nxp,imx95-mali # G310 > > >>> + - nxp,imx952-mali # G310 > > >> Can you explain why this is needed? Can it not be covered by the > > >> existing compatible? > > > There are functional differences in GPU module (GPUMIX) between i.MX95 > > > and i.MX952. So they cannot be fully covered by a single existing compatible. > > > On i.MX952, The GPU clock is controlled by hardware GPU auto > > > clock-gating mechanism, while the GPU clock is managed explicitly by the > > driver on i.MX95. > > > Because of these behavioral differences, separate compatible strings > > > "nxp,imx95-mali" and "nxp,imx952-mali" are needed to allow the driver > > > to handle the two variants independently and to keep room for future > > divergence. > > > > > > This information should be added in the commit message explaining why > > > > the change is needed. > > > > > > But then where is the driver code taking care of these diferences? > > > > Yes. Currently the driver does not require "nxp,imx952-mali" string. > However, when GPU ipa_counters are enabled to calculate the GPU busy_time/idle_time for > GPU DVFS feature, they will conflict with the hardware GPU auto clock‑gating mechanism, > causing GPU clock to remain always on. > In such cases, ipa_counters need to be disabled so that the GPU auto clock‑gating > mechanism can operate normally, using "nxp,imx952-mali" string. OK, I understand that you're following guidance from some other senior people on how to upstream patches so you've tried to create the smallest patchset to ensure that it gets reviewed and accepted, but in this case we need to see the other patches as well to decide if your approach is the right one and we do need a separate compatible string. If enabling GPU ipa_counters causes the clocks to get stuck active, that feels like a hardware bug, so figuring out how to handle that is more important than adding a compatible string. Either add the patch(es) that use the compatible to this series in v2, or put a comment in the commit message on where we can see the driver changes. Best regards, Liviu -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯