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Tue, 25 Jan 2022 23:30:35 -0800 Message-ID: Date: Wed, 26 Jan 2022 08:30:32 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH net-next v2 2/3] net: macb: Added ZynqMP-specific initialization Content-Language: en-US To: Robert Hancock , CC: , , , , , , References: <20220125170533.256468-1-robert.hancock@calian.com> <20220125170533.256468-3-robert.hancock@calian.com> From: Michal Simek In-Reply-To: <20220125170533.256468-3-robert.hancock@calian.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 9778b9d7-a497-401f-5377-08d9e09dbfed X-MS-TrafficTypeDiagnostic: BL3PR02MB8300:EE_ X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:8273; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jan 2022 07:30:38.2718 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9778b9d7-a497-401f-5377-08d9e09dbfed X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: BN1NAM02FT011.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR02MB8300 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 1/25/22 18:05, Robert Hancock wrote: > The GEM controllers on ZynqMP were missing some initialization steps which > are required in some cases when using SGMII mode, which uses the PS-GTR > transceivers managed by the phy-zynqmp driver. > > The GEM core appears to need a hardware-level reset in order to work > properly in SGMII mode in cases where the GT reference clock was not > present at initial power-on. This can be done using a reset mapped to > the zynqmp-reset driver in the device tree. > > Also, when in SGMII mode, the GEM driver needs to ensure the PHY is > initialized and powered on when it is initializing. > > Signed-off-by: Robert Hancock > --- > drivers/net/ethernet/cadence/macb_main.c | 48 +++++++++++++++++++++++- > 1 file changed, 47 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c > index a363da928e8b..80882908a68f 100644 > --- a/drivers/net/ethernet/cadence/macb_main.c > +++ b/drivers/net/ethernet/cadence/macb_main.c > @@ -34,7 +34,9 @@ > #include > #include > #include > +#include > #include > +#include > #include "macb.h" > > /* This structure is only used for MACB on SiFive FU540 devices */ > @@ -4455,6 +4457,50 @@ static int fu540_c000_init(struct platform_device *pdev) > return macb_init(pdev); > } > > +static int zynqmp_init(struct platform_device *pdev) > +{ > + struct net_device *dev = platform_get_drvdata(pdev); > + struct macb *bp = netdev_priv(dev); > + int ret; > + > + if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) { > + /* Ensure PS-GTR PHY device used in SGMII mode is ready */ > + struct phy *sgmii_phy = devm_phy_get(&pdev->dev, "sgmii-phy"); > + > + if (IS_ERR(sgmii_phy)) { > + ret = PTR_ERR(sgmii_phy); > + dev_err_probe(&pdev->dev, ret, > + "failed to get PS-GTR PHY\n"); > + return ret; > + } > + > + ret = phy_init(sgmii_phy); > + if (ret) { > + dev_err(&pdev->dev, "failed to init PS-GTR PHY: %d\n", > + ret); > + return ret; > + } I think reset below should be here to follow correct startup sequence. Thanks, Michal > + > + ret = phy_power_on(sgmii_phy); > + if (ret) { > + dev_err(&pdev->dev, "failed to power on PS-GTR PHY: %d\n", > + ret); > + return ret; > + } > + } > + > + /* Fully reset GEM controller at hardware level using zynqmp-reset driver, > + * if mapped in device tree. > + */ > + ret = device_reset_optional(&pdev->dev); > + if (ret) { > + dev_err_probe(&pdev->dev, ret, "failed to reset controller"); > + return ret; > + } > + > + return macb_init(pdev); > +} > + > static const struct macb_usrio_config sama7g5_usrio = { > .mii = 0, > .rmii = 1, > @@ -4550,7 +4596,7 @@ static const struct macb_config zynqmp_config = { > MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH, > .dma_burst_length = 16, > .clk_init = macb_clk_init, > - .init = macb_init, > + .init = zynqmp_init, > .jumbo_max_len = 10240, > .usrio = &macb_default_usrio, > };