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([2600:8803:e7e4:1d00:dc17:157d:e8b2:3ad6]) by smtp.gmail.com with ESMTPSA id 5614622812f47-40212c4dbe6sm315201b6e.49.2025.04.29.09.32.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 29 Apr 2025 09:32:20 -0700 (PDT) Message-ID: Date: Tue, 29 Apr 2025 11:32:19 -0500 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 2/2] iio: adc: add support for Nuvoton NCT7201 To: Eason Yang , jic23@kernel.org, lars@metafoo.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, nuno.sa@analog.com, javier.carrasco.cruz@gmail.com, tgamblin@baylibre.com, olivier.moysan@foss.st.com, alisadariana@gmail.com, gstols@baylibre.com, antoniu.miclaus@analog.com, eblanc@baylibre.com, andriy.shevchenko@linux.intel.com, matteomartelli3@gmail.com, marcelo.schmitt@analog.com, chanh@os.amperecomputing.com, KWLIU@nuvoton.com, yhyang2@nuvoton.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250429025505.3278016-1-j2anfernee@gmail.com> <20250429025505.3278016-3-j2anfernee@gmail.com> From: David Lechner Content-Language: en-US In-Reply-To: <20250429025505.3278016-3-j2anfernee@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 4/28/25 9:55 PM, Eason Yang wrote: > Add Nuvoton NCT7201/NCT7202 system voltage monitor 12-bit ADC driver > ... > +static int nct7201_init_chip(struct nct7201_chip_info *chip) > +{ > + struct device *dev = regmap_get_device(chip->regmap); > + __le16 data = cpu_to_le16(GENMASK(chip->num_vin_channels - 1, 0)); > + unsigned int value; > + int err; > + > + err = regmap_write(chip->regmap, NCT7201_REG_CONFIGURATION, > + NCT7201_BIT_CONFIGURATION_RESET); > + if (err) > + return dev_err_probe(dev, err, "Failed to reset chip\n"); > + > + /* > + * After about 25 msecs, the device should be ready and then the power-up > + * bit will be set to 1. If not, wait for it. > + */ > + fsleep(25 * USEC_PER_MSEC); > + > + err = regmap_read(chip->regmap, NCT7201_REG_BUSY_STATUS, &value); > + if (err) > + return dev_err_probe(dev, err, "Failed to read busy status\n"); > + if (!(value & NCT7201_BIT_PWR_UP)) > + return dev_err_probe(dev, -EIO, "Failed to power up after reset\n"); > + > + /* Enable Channel */ > + if (chip->num_vin_channels <= 8) > + err = regmap_write(chip->regmap, NCT7201_REG_CHANNEL_ENABLE, > + GENMASK(chip->num_vin_channels - 1, 0)); > + else > + err = regmap_bulk_write(chip->regmap, NCT7201_REG_CHANNEL_ENABLE, > + &data, sizeof(data)); Why does this use little-endian format for data but the later bulk_read of the same register uses CPU-endian? > + if (err) > + return dev_err_probe(dev, err, "Failed to enable channel\n"); > + > + err = regmap_bulk_read(chip->regmap, NCT7201_REG_CHANNEL_ENABLE, > + &chip->vin_mask, sizeof(chip->vin_mask)); > + if (err) > + return dev_err_probe(dev, err, > + "Failed to read channel enable register\n"); > + > + /* Start monitoring if needed */ > + err = regmap_set_bits(chip->regmap, NCT7201_REG_CONFIGURATION, > + NCT7201_BIT_CONFIGURATION_START); > + if (err) > + return dev_err_probe(dev, err, "Failed to start monitoring\n"); > + > + return 0; > +} > +