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From: Jacky Huang <ychuang570808@gmail.com>
To: Stephen Boyd <sboyd@kernel.org>,
	gregkh@linuxfoundation.org, jirislaby@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, lee@kernel.org,
	mturquette@baylibre.com, p.zabel@pengutronix.de,
	robh+dt@kernel.org
Cc: devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
	arnd@arndb.de, schung@nuvoton.com, mjchen@nuvoton.com,
	Jacky Huang <ychuang3@nuvoton.com>
Subject: Re: [PATCH v6 08/12] arm64: dts: nuvoton: Add initial ma35d1 device tree
Date: Wed, 29 Mar 2023 11:13:11 +0800	[thread overview]
Message-ID: <ad908782-8291-4240-d88e-61dff5a05ef7@gmail.com> (raw)
In-Reply-To: <e5221cd020bc60513df6a1c1859e1acc.sboyd@kernel.org>

Dear Stephen,


On 2023/3/29 上午 10:46, Stephen Boyd wrote:
> Quoting Jacky Huang (2023-03-28 19:39:36)
>> On 2023/3/29 上午 10:19, Stephen Boyd wrote:
>>> What do you use the syscon for then? The clock driver must want to use
>>> the syscon for something, implying that they are the same device.
>> The register lock mechanism is applied to protect many critical
>> registers from false written.
>> The register lock control register is one register in system controller.
>> Some registers of the clock controller are lock protected. Not only
>> clock controller, but other
>> IP such as RTC, PWM, ADC, etc, also have lock protected registers. All
>> these IP requires
>> syscon to access the lock/unlock control register in the system controller.
>> That's why we add a <&sys> to the clock controller.
>>
>> Should we implement a ma35d1-sysctl driver to protect register_lock()
>> and register_unlock()
>> and export to those drivers?  If yes, we can remove the <&sys> from
>> clock controller.
>>
> You can implement the lock and unlock in the hwspinlock framework. See
> drivers/hwspinlock.

I may not explain clearly enough. The lock/unlock register of system 
controller is more like
a kind of write protection for specific registers, rather than 
preventing hetero-core CPU access.
In many different IP of ma35d1 contain write protected registers.
In fact, ma35d1 has a "hardware semaphore" IP, and we have implemented 
the driver in drivers/hwspinlock.
Even the control register of "hardware semaphore" is also write protected.

So, should we implement a system controller driver to provide 
register_unlock() function?
Is it OK to have such a driver in drivers/mfd?
Or, just use syscon in device tree for those devices that have write 
protect registers.


Best regards,
Jacky Huang



  reply	other threads:[~2023-03-29  3:13 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-28  2:19 [PATCH v6 00/12] Introduce Nuvoton ma35d1 SoC Jacky Huang
2023-03-28  2:19 ` [PATCH v6 01/12] arm64: Kconfig.platforms: Add config for Nuvoton MA35 platform Jacky Huang
2023-03-28  2:19 ` [PATCH v6 02/12] arm64: defconfig: Add support for Nuvoton MA35 family SoCs Jacky Huang
2023-03-28  2:19 ` [PATCH v6 03/12] dt-bindings: clock: nuvoton: add binding for ma35d1 clock controller Jacky Huang
2023-03-29  8:14   ` Krzysztof Kozlowski
2023-03-28  2:19 ` [PATCH v6 04/12] dt-bindings: reset: nuvoton: add binding for ma35d1 IP reset control Jacky Huang
2023-03-28 17:48   ` Stephen Boyd
2023-03-29  8:53     ` Jacky Huang
2023-03-29  8:17   ` Krzysztof Kozlowski
2023-03-29  9:12     ` Jacky Huang
2023-03-29  9:27       ` Krzysztof Kozlowski
2023-03-29  9:33         ` Jacky Huang
2023-03-28  2:19 ` [PATCH v6 05/12] dt-bindings: mfd: syscon: Add nuvoton,ma35d1-sys compatible Jacky Huang
2023-04-05 15:27   ` Lee Jones
2023-03-28  2:19 ` [PATCH v6 06/12] dt-bindings: arm: Add initial bindings for Nuvoton platform Jacky Huang
2023-03-28 15:41   ` kernel test robot
2023-03-29  8:19   ` Krzysztof Kozlowski
2023-03-29  8:32     ` Jacky Huang
2023-03-29 13:07   ` Rob Herring
2023-03-30 10:41     ` Jacky Huang
2023-03-30 13:25       ` Krzysztof Kozlowski
2023-03-31  2:15         ` Jacky Huang
2023-04-03 20:33           ` Rob Herring
2023-04-06  2:09             ` Jacky Huang
2023-03-28  2:19 ` [PATCH v6 07/12] dt-bindings: serial: Document ma35d1 uart controller Jacky Huang
2023-03-29  8:20   ` Krzysztof Kozlowski
2023-03-29  8:44     ` Jacky Huang
2023-03-30  7:33       ` Krzysztof Kozlowski
2023-03-30 10:52         ` Jacky Huang
2023-03-30 13:12           ` Rob Herring
2023-03-31  2:03             ` Jacky Huang
2023-03-28  2:19 ` [PATCH v6 08/12] arm64: dts: nuvoton: Add initial ma35d1 device tree Jacky Huang
2023-03-28 17:57   ` Stephen Boyd
2023-03-29  2:03     ` Jacky Huang
2023-03-29  2:19       ` Stephen Boyd
2023-03-29  2:39         ` Jacky Huang
2023-03-29  2:46           ` Stephen Boyd
2023-03-29  3:13             ` Jacky Huang [this message]
2023-03-29  3:25               ` Stephen Boyd
2023-03-29  3:43                 ` Jacky Huang
2023-03-29  3:54                   ` Stephen Boyd
2023-03-29  6:02                     ` Jacky Huang
2023-03-29 17:52                       ` Stephen Boyd
2023-03-29  8:21   ` Krzysztof Kozlowski
2023-03-29  8:36     ` Jacky Huang
2023-03-28  2:19 ` [PATCH v6 09/12] clk: nuvoton: Add clock driver for ma35d1 clock controller Jacky Huang
2023-03-28 18:18   ` Stephen Boyd
2023-03-30 10:36     ` Jacky Huang
2023-03-28  2:19 ` [PATCH v6 10/12] reset: Add Nuvoton ma35d1 reset driver support Jacky Huang
2023-04-24 20:02   ` Philipp Zabel
2023-04-25  1:22     ` Jacky Huang
2023-03-28  2:19 ` [PATCH v6 11/12] tty: serial: Add Nuvoton ma35d1 serial " Jacky Huang
2023-03-28  9:23   ` Jiri Slaby
2023-03-29  8:06     ` Jacky Huang
2023-03-31  0:29   ` kernel test robot
2023-03-28  2:19 ` [PATCH v6 12/12] MAINTAINERS: Add entry for NUVOTON MA35 Jacky Huang

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