From: Brian Masney <bmasney@redhat.com>
To: Marek Vasut <marex@nabladev.com>
Cc: linux-clk@vger.kernel.org, Peng Fan <peng.fan@nxp.com>,
Conor Dooley <conor+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Michael Walle <michael@walle.cc>, Rob Herring <robh@kernel.org>,
Stephen Boyd <sboyd@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/4] clk: fsl-sai: Add i.MX8M support with 8 byte register offset
Date: Mon, 6 Apr 2026 12:42:58 -0400 [thread overview]
Message-ID: <adPikplWEEPfYg7i@redhat.com> (raw)
In-Reply-To: <20260404183419.46455-2-marex@nabladev.com>
On Sat, Apr 04, 2026 at 08:33:26PM +0200, Marek Vasut wrote:
> The i.MX8M/Mini/Nano/Plus variant of the SAI IP has control registers
> shifted by +8 bytes and requires additional bus clock. Add support for
> the i.MX8M variant of the IP with this register shift and additional
> clock.
>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Signed-off-by: Marek Vasut <marex@nabladev.com>
Reviewed-by: Brian Masney <bmasney@redhat.com>
next prev parent reply other threads:[~2026-04-06 16:43 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-04 18:33 [PATCH v3 1/4] dt-bindings: clock: fsl-sai: Document i.MX8M support Marek Vasut
2026-04-04 18:33 ` [PATCH v3 2/4] clk: fsl-sai: Add i.MX8M support with 8 byte register offset Marek Vasut
2026-04-06 16:42 ` Brian Masney [this message]
2026-04-04 18:33 ` [PATCH v3 3/4] dt-bindings: clock: fsl-sai: Document clock-cells = <1> support Marek Vasut
2026-04-04 18:33 ` [PATCH v3 4/4] clk: fsl-sai: Add MCLK generation support Marek Vasut
2026-04-06 17:10 ` Brian Masney
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