Re: [PATCH v4 4/5] dt-bindings: memory-controllers: Add support for Versal NET EDAC

[Krzysztof Kozlowski <krzk@kernel.org>]

On 02/01/2025 18:44, Shubhrajyoti Datta wrote:
> +
> +maintainers:
> +  - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
> +
> +description:
> +  The integrated DDR Memory Controllers (DDRMCs) support both DDR5 and LPDDR5
> +  compact and extended  memory interfaces. Versal NET DDR memory controller has an optional ECC support

Please wrap code according to coding style (checkpatch is not a coding
style description, but only a tool).


> +  which correct single bit ECC errors and detect double bit ECC errors.
> +  It also has support for reporting other errors like MMCM (Mixed-Mode Clock
> +  Manager) errors and General software errors.
> +
> +properties:
> +  compatible:
> +    const: amd,versal-net-ddrmc5-1.0

1.0 looks redundant. Usually SoC does not change... Anyway, commit msg
should explain why 1.0 is needed (IOW, why exception is justified).

> +
> +  amd,rproc:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description:
> +      phandle to the remoteproc_r5 rproc node using which APU interacts
> +      with remote processor. APU primarily communicates with the RPU for
> +      accessing the DDRMC address space and getting error notification.
> +
> +required:
> +  - compatible
> +  - amd,rproc
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    memory-controller {
> +       compatible = "amd,versalnet-ddrmc";

And this one?


Best regards,
Krzysztof