Hello, On Thu, Apr 09, 2026 at 12:45:12AM +0000, Yixun Lan wrote: > Add one secondary optional bus clock for the PWM PXA driver, also keep it > compatible with old single clock. > > The SpacemiT K3 SoC require one bus clock for PWM controller, acquire s/one/a/ ? > and enable it during probe phase. > > Signed-off-by: Yixun Lan > --- > drivers/pwm/pwm-pxa.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/pwm/pwm-pxa.c b/drivers/pwm/pwm-pxa.c > index 0f5bdb0e395e..2ace31405c2d 100644 > --- a/drivers/pwm/pwm-pxa.c > +++ b/drivers/pwm/pwm-pxa.c > @@ -53,6 +53,7 @@ struct pxa_pwm_chip { > struct device *dev; > > struct clk *clk; > + struct clk *bus_clk; > void __iomem *mmio_base; > }; > > @@ -177,7 +178,12 @@ static int pwm_probe(struct platform_device *pdev) > return PTR_ERR(chip); > pc = to_pxa_pwm_chip(chip); > > - pc->clk = devm_clk_get(dev, NULL); > + pc->bus_clk = devm_clk_get_optional_enabled(dev, "bus"); > + if (IS_ERR(pc->bus_clk)) > + return dev_err_probe(dev, PTR_ERR(pc->bus_clk), "Failed to get bus clock\n"); > + > + /* Get named func clk if bus clock is valid */ > + pc->clk = devm_clk_get(dev, pc->bus_clk ? "func" : NULL); A local variable for bus_clk would be sufficient. I'm not sure, but I think passing "func" unconditionally to devm_clk_get() would also work fine. Best regards Uwe