From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B0B5418A6C6; Tue, 20 Aug 2024 09:26:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724146019; cv=none; b=Lx86GYzNGcmY8NyrMl/uU70Z+xze6iz4/sd1935HZbLqr8JNREFvkoZQEnQjysIx+pyWTpwjATZ4S6dUtuFaJh4CzNIVA/Mj0e23MPGk4VZmJIooelrlnE1pbjpzzVg0MCzVyx3Rx9iQwfZbcQh3CeFQrJlxuK36v586UR/Na8c= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724146019; c=relaxed/simple; bh=kop63EL7ROeC8ZjTSa24ig982G1wGzEfLfTlKCt7Yi4=; h=Message-ID:Date:MIME-Version:Subject:To:References:From: In-Reply-To:Content-Type; b=n5xCQUBZfBw0JBZu3pUzi4HMmR8JPD82UWh5KUUuVtX8c+dxNz0te1htOz+mxDjTkEqr0j8jQvWCy/Ao7U7KvKNdBrVYgVCtatd17oJIyfXrGOEERfiUrYfX6uPOP9oM6bfZIgncO7Dkkonb0GFyh+Z6oudoObY7MMNBmKpOVWw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nudKvcqn; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nudKvcqn" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7CB9EC4AF09; Tue, 20 Aug 2024 09:26:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724146019; bh=kop63EL7ROeC8ZjTSa24ig982G1wGzEfLfTlKCt7Yi4=; h=Date:Subject:To:References:From:In-Reply-To:From; b=nudKvcqne9ZjBJo4UMhBnSm609IPW3AJvJbqzsheWiBYJgWyLB4HxpsiYJ7PYFwBt 7qd7ENiCdoE15TqP10U3wXrG0qsTzJZKPK1npVHVXjmoQiLm5OpFB8+hbrL1Z+Schk 5E0pUVnuEkZjHwqQ1UuwWD2NSaDJpp4Gd3Kn0LP1AQXvoSxsXm1eivAE2CP1bK1I0G 9IYVG/XnRCMZzfLkovP1aqf8r3th+rUePiaRY4AOaI6mmEkkvAZ1MthIuPqhd1q5zB LWotEWjJtQW5yLYrMSVu8uXhz7Af5rnUKcckqPY0+o7zk4Fu+8gzGhXYdDCWVxEOi3 qbj5NlXWwQV8w== Message-ID: Date: Tue, 20 Aug 2024 11:26:51 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 4/5] arm64: dts: qcom: sdm670: add camcc To: Vladimir Zapolskiy , Richard Acayan , Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org References: <20240819221051.31489-7-mailingradian@gmail.com> <20240819221051.31489-11-mailingradian@gmail.com> <7d26a62b-b898-4737-bd53-f49821e3b471@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <7d26a62b-b898-4737-bd53-f49821e3b471@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 20.08.2024 11:23 AM, Vladimir Zapolskiy wrote: > On 8/20/24 01:10, Richard Acayan wrote: >> The camera clock controller on SDM670 controls the clocks that drive the >> camera subsystem. The clocks are the same as on SDM845. Add the camera >> clock controller for SDM670. >> >> Reviewed-by: Bryan O'Donoghue >> Signed-off-by: Richard Acayan >> --- >>   arch/arm64/boot/dts/qcom/sdm670.dtsi | 10 ++++++++++ >>   1 file changed, 10 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi >> index 187c6698835d..ba93cef33dbb 100644 >> --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi >> @@ -1400,6 +1400,16 @@ spmi_bus: spmi@c440000 { >>               #interrupt-cells = <4>; >>           }; >>   +        camcc: clock-controller@ad00000 { >> +            compatible = "qcom,sdm845-camcc"; > > Here it's wrong, and the compatible property value shall contain > "qcom,sdm670-camcc", probably it could contain both values though. > > It may require to add a new compatible to dt documentation and, > if needed, to the corresponding clock driver. +1, even if the blocks are physically the same, please add a SoC-specific compatible (with a fallback to 845 if that's the case) just in case there are some implementation problems only concerning this instance Konrad