Re: [PATCH 2/4] arm64: dts: imx95: switch usb3 controller to flattened model

[Frank Li <Frank.li@nxp.com>]

On Tue, Apr 21, 2026 at 06:55:01PM +0800, Xu Yang wrote:
> Switch to use flattened model for USB3 controller. To enable USB
> controller with restricted DMA access range to work correctly, add a
> pseudo simple-bus to constrain the dma address.

i.mx95 should fix >4G dma space's problem. Does it impact other no-nxp
boards?

Need do break compatible judgement such as

i.MX95 is new SoC and still is heave development. The break compatible is
accepable at development early phase.

You can rephrase it.

Frank

>
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx95.dtsi | 48 ++++++++++++------------
>  1 file changed, 24 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 71394871d8dd..91048501a692 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -1772,45 +1772,45 @@ smmu: iommu@490d0000 {
>  			};
>  		};
>
> -		usb3: usb@4c010010 {
> -			compatible = "fsl,imx95-dwc3", "fsl,imx8mp-dwc3";
> -			reg = <0x0 0x4c010010 0x0 0x04>,
> -			      <0x0 0x4c1f0000 0x0 0x20>;
> -			clocks = <&scmi_clk IMX95_CLK_HSIO>,
> -				 <&scmi_clk IMX95_CLK_32K>;
> -			clock-names = "hsio", "suspend";
> -			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> +		hsio_blk_ctl: syscon@4c0100c0 {
> +			compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
> +			reg = <0x0 0x4c0100c0 0x0 0x1>;
> +			#clock-cells = <1>;
> +			clocks = <&clk_sys100m>;
> +			power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
> +		};
> +
> +		bus@4c100000 {
> +			compatible = "simple-bus";
>  			#address-cells = <2>;
>  			#size-cells = <2>;
> -			ranges;
> -			power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
>  			dma-ranges = <0x0 0x0 0x0 0x0 0x10 0x0>;
> -			status = "disabled";
> +			ranges;
>
> -			usb3_dwc3: usb@4c100000 {
> -				compatible = "snps,dwc3";
> -				reg = <0x0 0x4c100000 0x0 0x10000>;
> +			usb3: usb3_dwc3: usb@4c100000 {
> +				compatible = "nxp,imx8mp-dwc3";
> +				reg = <0x0 0x4c100000 0x0 0x10000>,
> +				      <0x0 0x4c010010 0x0 0x04>,
> +				      <0x0 0x4c1f0000 0x0 0x20>;
> +				reg-names = "core", "blkctl", "glue";
>  				clocks = <&scmi_clk IMX95_CLK_HSIO>,
> +					 <&scmi_clk IMX95_CLK_HSIO>,
>  					 <&scmi_clk IMX95_CLK_24M>,
>  					 <&scmi_clk IMX95_CLK_32K>;
> -				clock-names = "bus_early", "ref", "suspend";
> -				interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> +				clock-names = "hsio", "bus_early", "ref", "suspend";
> +				interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>,
> +					     <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> +				interrupt-names = "dwc_usb3", "wakeup";
> +				power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
>  				phys = <&usb3_phy>, <&usb3_phy>;
>  				phy-names = "usb2-phy", "usb3-phy";
>  				snps,gfladj-refclk-lpm-sel-quirk;
>  				snps,parkmode-disable-ss-quirk;
>  				iommus = <&smmu 0xe>;
> +				status = "disabled";
>  			};
>  		};
>
> -		hsio_blk_ctl: syscon@4c0100c0 {
> -			compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
> -			reg = <0x0 0x4c0100c0 0x0 0x1>;
> -			#clock-cells = <1>;
> -			clocks = <&clk_sys100m>;
> -			power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
> -		};
> -
>  		usb3_phy: phy@4c1f0040 {
>  			compatible = "fsl,imx95-usb-phy", "fsl,imx8mp-usb-phy";
>  			reg = <0x0 0x4c1f0040 0x0 0x40>,
> --
> 2.34.1
>