Re: [net-next,PATCH v5 3/3] net: phy: realtek: Add property to enable SSC

[Aleksander Jan Bajkowski <olek2@wp.pl>]

Hi Marek,

On 05/04/2026 23:59, Marek Vasut wrote:
> On 4/5/26 10:23 PM, Aleksander Jan Bajkowski wrote:
>
> Hi,
>
>>> +static int rtl8211f_config_clkout_ssc(struct phy_device *phydev)
>>> +{
>>> +    struct rtl821x_priv *priv = phydev->priv;
>>> +    struct device *dev = &phydev->mdio.dev;
>>> +    int ret;
>>> +
>>> +    /* The value is preserved if the device tree property is absent */
>>> +    if (!priv->enable_clkout_ssc)
>>> +        return 0;
>>> +
>>> +    /* RTL8211FVD has PHYCR2 register, but configuration of CLKOUT SSC
>>> +     * is not currently supported by this driver due to different bit
>>> +     * layout.
>>> +     */
>>> +    if (phydev->drv->phy_id == RTL_8211FVD_PHYID)
>>> +        return 0;
>>> +
>>> +    /* Unnamed registers from EMI improvement parameters 
>>> application note 1.2 */
>>> +    ret = phy_write_paged(phydev, 0xd09, 0x10, 0xcf00);
>>> +    if (ret < 0) {
>>> +        dev_err(dev, "CLKOUT SSC initialization failed: %pe\n", 
>>> ERR_PTR(ret));
>>> +        return ret;
>>> +    }
>>> +
>>> +    ret = phy_write(phydev, RTL8211F_SSC_CLKOUT, 0x38c3);
>>
>> Only registers 0x10–0x17 require paged operations. The remaining 
>> registers
>> are mapped directly into the PHY address space. This is mentioned in 
>> commit
>> 650e55f224a575cdb18c984b95036109519502d1. Paged and direct access return
>> the same results. With this in mind, I believe that 
>> RTL8211F_SSC_CLKOUT is
>> an alias for RTL8211F_PHYCR2 and is described on page 45 of the 
>> datasheet[1].
>>
>> 1. RTL8211F(I)-CG/RTL8211FD(I)-CG Datasheet
> This is a good point indeed, I think I can simply set PHYCR2 bits 
> 7,12,13 to enable the CLKOUT SSC ?
Sounds correct.


Regards,
Aleksander