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Date: Tue, 26 May 2026 16:42:15 +0200
From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Cc: Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>, devicetree@vger.kernel.org,
	linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/2] Enable LPC interrupt controller on MIPS LS7A systems
Message-ID: <ahWxR7sW7o06IDDX@alpha.franken.de>
References: <20260411101744.4020216-1-zhengxingda@iscas.ac.cn>
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In-Reply-To: <20260411101744.4020216-1-zhengxingda@iscas.ac.cn>

On Sat, Apr 11, 2026 at 06:17:42PM +0800, Icenowy Zheng wrote:
> This patchset tries to enable support for LPC interrupts on MIPS-based
> Loongson systems with Loongson 7A1000 PCH chip.
> 
> The corresponding irqchip support (along with the DT binding) is already
> added to the tip tree.
> 
> Tested on a Haier Boyue G51 system with legacy i8042 keyboard/mouse as
> integrated ones.
> 
> This patchset is splitted from the original patchset that contains both
> driver part and DT part.
> 
> Icenowy Zheng (2):
>   MIPS: Loongson64: dts: Sort nodes
>   MIPS: Loongson64: dts: Add node for LS7A PCH LPC
> 
>  arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 17 +++++++++++++----
>  1 file changed, 13 insertions(+), 4 deletions(-)

series applied to mips-next

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]