From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f54.google.com (mail-wr1-f54.google.com [209.85.221.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03C583AFB12 for ; Mon, 8 Jun 2026 08:28:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.54 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780907294; cv=none; b=OrUQULNiS1H/6oLkCHaA1ZALzKTje3TCMThwIoOthWtFzPSIk2xSQfwPDJZBIelzNMlJJ94kRfeuBR9FugiYhGsjVut8t0Xx2SgiQpB+z3UYGpk1HEY7ym3LiDoUDPFg2nGgd9UXrU+1AyfIC/vcicq/HaK0Qp3ZgMIfy/97Kc8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780907294; c=relaxed/simple; bh=1wZNWjUwc+vC0bVgQ0ZlbNdOYECuxeaY+pojCpm9HA8=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=UkoKpVyh6kjomPGURgYtfs8rPbHiukUkcp7/g1tmS8VMeYgUNxEZS+EV6zOPIVdCdzS5jTM5aI4S/yOKS4/5wwwwuPr8NjX0Vcl9bnh3IhXsPYbCm4lVtZWTT7YS1zAohWGI48704OVoza1xd2LBmB0kZ9afbA693iYJWu8SHPE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=pRxHhS86; arc=none smtp.client-ip=209.85.221.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="pRxHhS86" Received: by mail-wr1-f54.google.com with SMTP id ffacd0b85a97d-45efa80e0afso3096557f8f.2 for ; Mon, 08 Jun 2026 01:28:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1780907288; x=1781512088; darn=vger.kernel.org; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=PPeReRpnLBnfoJVjUD6XA7EpJ91dRyU67u4RwbeYW+E=; b=pRxHhS86/i5lFqEWxQzb0O+X8Zyp37Hv3tGh3OHmku2+J0DMTShEIoDFPF5+g16XoX 0/xzJY28v1rymS9yzI7KHMRk0IeziIOkWIPqVfkUye8wZJttEFW/FcI+aU86Rikvat9l 3jA+YliBw41w8GQE7xKZ9EQjOQQbL+YYnxuJjX4jf3aPIR1WfHhJPQdJZuBSe+xnUAl+ dtoBA37i1x1kYXtM5lfvLefrGVE01DMzYBPcoep0q9+uZ3Eny3uorpfzkgRxuco4ZTbC bxYoIh5Qr9/yxZVLN5ZvPQHKjtMWM/Z9Lf1PsHtLLKLv1nCCj0WS1WBtDAK3sVV2iqwl OY1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780907288; x=1781512088; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=PPeReRpnLBnfoJVjUD6XA7EpJ91dRyU67u4RwbeYW+E=; b=fnfyrUZGfIysfnI8oivdajJXvhxS3WpbE2sfvYYWRb5mMhiea+CGPnJCpnH5CMWL3O IajHWKRrocowWMFGfQlZG8IJHf1T1haEmhwfkU4MnrEuCrLsd1WPXHWlmqiOJ8WBO9MY TKKFcg98ohaWjLapOBL1jo/R2+JUoJijpfLGZ6hJqmaA4v4hjMTrWDLbGJ1ON4765xfp BSqaJZigEzZpvVqrv8iKJLAnmeijnd2z615uM4tTVX55DFOYK4wsCFEn09MSG7kn2H3q KURUann3Jeb1pqMf3pH4pRLW+bGF+a00IoYYegFanNm5ZgJUpC7CPNy7a9/JLFaCUy8J klfQ== X-Forwarded-Encrypted: i=1; AFNElJ/GvrxPGAomOp2PxasRWzbdnxBZot+q9AWn27CnR/iXO3nJlf2W0qJzwiZAOrMfv1K11/E16V62Uf0+@vger.kernel.org X-Gm-Message-State: AOJu0YxyxhfNFKiVj18K+mj2jHy6rwrEUclJnGbuWvJU3Rg2nyiO/b6+ aYnT6bRYNhjyuET27Kdd+C9xffQSeSLw55a0iq0WTn1vkql81OkNb9vW X-Gm-Gg: Acq92OEM/xSm+ouIVHTHSFvMuupvPzWiSZKrCxhWCj/pl90/hW6Uhe5eKRVQuCq4Wk2 VaCCkcNzSei2n1USd1vDBOAZx6b8RU9+E20FuAWzfByjPNHhQcP05SY3XCmOMsCGLINODRAGm7i IVPYrrRNBep1TZQ0seZ1LE+9YKvuvxFtg4JXpQbPYYGy6hqXLURjbxugRCVYAIzjYncN+5USgYB kXB9lc/rAzSshN7yvL9OWqtBUP+zpicLcmMxAKi9G/e6TbOzUc7Ip1UxMUsN+Rupodxr+QE07q5 4PF0+X3kSFVqpjKEJ+TzLW+vyva917TzfAud3itHrXOkAppwntT2SzxJrRtoHWft0aLxy/DcHOj 0OmiXeluLj6vr+CpneoJD9JsUbVTd0TxVvkC4iclbnnUFb+S26/AxtkfecnJGS5fD8Udxg/SQhz f3uqAegYuJuK7WZBm2+oCM1CPXrQ== X-Received: by 2002:a05:6000:29d6:b0:460:3233:beeb with SMTP id ffacd0b85a97d-4603233c00bmr13957776f8f.43.1780907287945; Mon, 08 Jun 2026 01:28:07 -0700 (PDT) Received: from nsa ([148.63.225.166]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4601f2ec711sm49104616f8f.12.2026.06.08.01.28.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jun 2026 01:28:07 -0700 (PDT) Date: Mon, 8 Jun 2026 09:29:07 +0100 From: Nuno =?utf-8?B?U8Oh?= To: Jonathan Cameron Cc: rodrigo.alencar@analog.com, Michael Auchter , linux@analog.com, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org, Michael Hennerich , David Lechner , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Kees Cook , "Gustavo A. R. Silva" Subject: Re: [PATCH 06/12] iio: dac: ad5686: consume optional reset signal Message-ID: References: <20260602-ad5686-new-features-v1-0-691e01883d27@analog.com> <20260602-ad5686-new-features-v1-6-691e01883d27@analog.com> <20260603130833.007c1526@jic23-huawei> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260603130833.007c1526@jic23-huawei> On Wed, Jun 03, 2026 at 01:08:33PM +0100, Jonathan Cameron wrote: > On Wed, 3 Jun 2026 09:28:26 +0100 > Nuno Sá wrote: > > > On Tue, Jun 02, 2026 at 05:33:53PM +0100, Rodrigo Alencar via B4 Relay wrote: > > > From: Rodrigo Alencar > > > > > > Add RESET pin GPIO support through an optional reset control, which is > > > local to the probe function. Also, include delays for power-up time and > > > reset pulse width. > > > > > > Signed-off-by: Rodrigo Alencar > > > --- > > > drivers/iio/dac/ad5686.c | 13 +++++++++++++ > > > 1 file changed, 13 insertions(+) > > > > > > diff --git a/drivers/iio/dac/ad5686.c b/drivers/iio/dac/ad5686.c > > > index 4a8c587ff116..345ca2436332 100644 > > > --- a/drivers/iio/dac/ad5686.c > > > +++ b/drivers/iio/dac/ad5686.c > > > @@ -8,12 +8,14 @@ > > > #include > > > #include > > > #include > > > +#include > > > #include > > > #include > > > #include > > > #include > > > #include > > > #include > > > +#include > > > #include > > > #include > > > > > > @@ -471,6 +473,7 @@ int ad5686_probe(struct device *dev, > > > const struct ad5686_chip_info *chip_info, > > > const char *name, const struct ad5686_bus_ops *ops) > > > { > > > + struct reset_control *rstc; > > > struct ad5686_state *st; > > > struct iio_dev *indio_dev; > > > int ret, i; > > > @@ -506,6 +509,16 @@ int ad5686_probe(struct device *dev, > > > return dev_err_probe(dev, -EINVAL, > > > "invalid or not provided vref voltage\n"); > > > > > > + rstc = devm_reset_control_get_optional_exclusive(dev, NULL); > > > + if (IS_ERR(rstc)) > > > + return dev_err_probe(dev, PTR_ERR(rstc), > > > + "Failed to get reset control\n"); > > > > On top of what Andy stated, I'm fairly sure > > devm_reset_control_get_optional_exclusive() returns with the GPIO > > asserted. > > We've been getting reports on that not being the case from Sashiko > and when I last looked into one of those it definitely isn't documented > as doing so and I got the impression it is a reset controller specific > thing. Do we are fine here because the gpio reset controller reset_gpio_probe() > includes: > priv->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); > if (IS_ERR(priv->reset)) > return dev_err_probe(dev, PTR_ERR(priv->reset), > "Could not get reset gpios\n"); > Which I guess puts it in to reset? > > So do we assume gpio reset or not for this sort of driver that specifies > in the binding reset-gpios. Now if the following is implying we need > a deasserted to asserted transition (maybe?) then we'd need to force > a deassert first. Yeah, fair enough. I think in practice it works but we are relying in internals of other piece of code for it to work which is not great. - Nuno Sá > > Btw I used claude to explore this and it hallucinated the reverse polarity > providing otherwise correct code for what was in reset_gpio_probe() but > oddly editing that one line. I was being lazy and using the web UI rather > than a version with access to my git tree so maybe it scraped some > buggy code from a downstream tree. Anyhow watch out for subtle garbage! > It also took a few requests to get it to figure out the logical nature > of the GPIO signals rather than assuming they were controlling whether > the line was high or low directly. > > Jonathan > > > > > > > + > > > + udelay(5); /* power-up time */ > > > + reset_control_assert(rstc); > > > + udelay(1); /* reset pulse: comfortably bigger than the spec */ > > > + reset_control_deassert(rstc); > > > + > > > /* Initialize masks to all ones */ > > > st->pwr_down_mask = ~0; > > > st->pwr_down_mode = ~0; > > > > > > -- > > > 2.43.0 > > > > > > >