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Wed, 10 Jun 2026 11:02:22 -0700 (PDT) Date: Wed, 10 Jun 2026 20:02:20 +0200 From: Stephan Gerhold To: Taniya Das Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Shawn Guo , Bryan O'Donoghue , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 12/12] clk: qcom: gcc-mdm9607: Drop redundant register update during probe Message-ID: References: <20260609-qcom-clk-mdm9607-fixes-v1-0-5e9717faf842@linaro.org> <20260609-qcom-clk-mdm9607-fixes-v1-12-5e9717faf842@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Wed, Jun 10, 2026 at 11:01:34PM +0530, Taniya Das wrote: > On 6/9/2026 7:44 PM, Stephan Gerhold wrote: > > From: Stephan Gerhold > > > > GPLL0 is pretty much guaranteed to be already on (and voted) during boot, > > since it's used by the CPU and also various other components such as UART. > > We also vote for this bit in the actual GPLL0 definition, which will be set > > as soon as any driver in the kernel requires using the GPLL0 clock. > > > > All in all, this makes separately voting for GPLL0 during probe redundant, > > especially because the "acpuclock" in the comment is a downstream construct > > that does not exist in upstream. > > > > Signed-off-by: Stephan Gerhold > > --- > > drivers/clk/qcom/gcc-mdm9607.c | 11 +---------- > > 1 file changed, 1 insertion(+), 10 deletions(-) > > > > diff --git a/drivers/clk/qcom/gcc-mdm9607.c b/drivers/clk/qcom/gcc-mdm9607.c > > index 0bd4c12483cd..ce78ebc8ffec 100644 > > --- a/drivers/clk/qcom/gcc-mdm9607.c > > +++ b/drivers/clk/qcom/gcc-mdm9607.c > > @@ -1565,16 +1565,7 @@ MODULE_DEVICE_TABLE(of, gcc_mdm9607_match_table); > > > > static int gcc_mdm9607_probe(struct platform_device *pdev) > > { > > - struct regmap *regmap; > > - > > - regmap = qcom_cc_map(pdev, &gcc_mdm9607_desc); > > - if (IS_ERR(regmap)) > > - return PTR_ERR(regmap); > > - > > - /* Vote for GPLL0 to turn on. Needed by acpuclock. */ > > - regmap_update_bits(regmap, 0x45000, BIT(0), BIT(0)); > > This was to ensure that the (APCS_GPLL_ENA_VOTE) vote indeed has a vote > from CPU. AFAIR, the boot up was not using this particular PLL vote > register and no piggy backing for the GPLL vote. > Hm, I'm not sure when this would be the case. The original LK bootloader source code also sets this bit when enabling GPLL-related clocks, so I'm not sure when/why this bit would be missing. Either way, I don't think it will make a difference in practice, since it's pretty much guaranteed that one of the later clock enable sequences (UART, USB, ...) is going to vote for GPLL0 as well. Thanks, Stephan