Re: [PATCH 2/2] ARM: dts: renesas: r9a06g032-rzn1d400-eb: Enable SPI-FRAM

[Wolfram Sang <wsa+renesas@sang-engineering.com>]

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Hi Geert,

thank you for the reviews!

> > +&spi1 {
> > +       pinctrl-0 = <&pins_spi1>;
> > +       pinctrl-names = "default";
> 
> Please document that this depends on SW2-4 being OFF.

Hmmm, this is a bit weird. SW2-4 does only do the routing to the SPI5
(target) controller connector. SPI1 is totally independent of that. I
can read out the FRAM with 2-4 being ON. Dunno how well that behaves in
parallel with RMII2 ;) Shall I still do the comment?

> > +       cs-gpios = <&gpio2a 31 GPIO_ACTIVE_LOW>;
> 
> It doesn't work with hardware chip-select?

I couldn't get it to work and I know other people also use cs-gpios on
their custom boards.

> > +       fram: fram@0 {
> > +               compatible = "cypress,fm25", "atmel,at25";
> > +               reg = <0>;
> > +               spi-max-frequency = <12500000>;
> 
> The actual FRAM part seems to support 40 MHz, but that may
> be limited by the board wiring.

So, what do we do? In my tests, 40MHz did not work. Up to 30MHz it seems
to work. However, all of the BSP DTS snippets say RZ/N1 can only do up
to 12.5MHz. I don't have an errata documenting this nor could I find
another source. I would still rather play safe here. I could add a
comment, though.

Happy hacking,

   Wolfram


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