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R. Silva" Subject: Re: [PATCH v3 10/12] iio: dac: ad5686: add triggered buffer support Message-ID: References: <20260616-ad5686-new-features-v3-0-f829fb7e9262@analog.com> <20260616-ad5686-new-features-v3-10-f829fb7e9262@analog.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260616-ad5686-new-features-v3-10-f829fb7e9262@analog.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo On Tue, Jun 16, 2026 at 09:21:16AM +0100, Rodrigo Alencar via B4 Relay wrote: > Implement trigger handler by leveraging the LDAC gpio to update all DAC > channels at once when it is available. Also, the multiple channel writes > can be flushed at once with the sync() operation. ... > +static irqreturn_t ad5686_trigger_handler(int irq, void *p) > +{ > + struct iio_poll_func *pf = p; > + struct iio_dev *indio_dev = pf->indio_dev; > + struct iio_buffer *buffer = indio_dev->buffer; > + struct ad5686_state *st = iio_priv(indio_dev); > + u16 val[AD5686_MAX_CHANNELS] = { }; > + unsigned int scan_count; > + int ret, ch, i = 0; Decouple assignment and definition. Also do 'i' and 'ch' need to be signed? > + bool async_update; > + u8 cmd; > + > + ret = iio_pop_from_buffer(buffer, val); > + if (ret) > + goto out_notify_done; > + > + mutex_lock(&st->lock); > + > + scan_count = bitmap_weight(indio_dev->active_scan_mask, > + iio_get_masklength(indio_dev)); > + async_update = st->ldac_gpio && scan_count > 1; > + if (async_update) { > + /* use LDAC to update all channels simultaneously */ > + cmd = AD5686_CMD_WRITE_INPUT_N; > + gpiod_set_value_cansleep(st->ldac_gpio, 0); > + } else { > + cmd = AD5686_CMD_WRITE_INPUT_N_UPDATE_N; > + } > + > + iio_for_each_active_channel(indio_dev, ch) { > + ret = st->ops->write(st, cmd, indio_dev->channels[ch].address, val[i++]); > + if (ret) > + break; > + } > + > + /* > + * If sync() is available, it is called here regardless of write > + * failure to allow bus implementation to reset. In that case, partial > + * writes are unlikely as the write operations would just queue up > + * the transfers. > + */ > + if (st->ops->sync) > + ret = st->ops->sync(st); /* flush all pending transfers */ 'ret' is set but not used. Always compile your code with `make W=1` and both GCC and clang. > + if (async_update) > + gpiod_set_value_cansleep(st->ldac_gpio, 1); > + > + mutex_unlock(&st->lock); > +out_notify_done: > + iio_trigger_notify_done(indio_dev->trig); > + > + return IRQ_HANDLED; > +} -- With Best Regards, Andy Shevchenko