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Thu, 09 Jul 2026 09:11:42 -0700 (PDT) Date: Thu, 9 Jul 2026 17:12:47 +0100 From: Nuno =?utf-8?B?U8Oh?= To: Guenter Roeck Cc: Fred Chen , "Torreno, Alexis Czezar" , Krzysztof Kozlowski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Corbet , Shuah Khan , Jonathan Cameron , Wensheng Wang , Frank Li , Brian Chiang , Cosmo Chou , Dixit Parmar , Eddie James , Antoni Pokusinski , Thorsten Blum , Ashish Yadav , Syed Arif , ChiShih Tsai , Abdurrahman Hussain , "Paller, Kim Seer" , Colin Huang , Yuxi Wang , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-hwmon@vger.kernel.org" , "linux-doc@vger.kernel.org" Subject: Re: [PATCH 2/2] hwmon: (pmbus) Add driver for Analog Devices MAX20912 and MAX20916 Message-ID: References: <20260707122701.751878-3-fredchen.openbmc@gmail.com> <20260708-true-carp-of-champagne-a0dcca@quoll> <5b865eed-ae58-47fc-8d80-e14a76a93050@roeck-us.net> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <5b865eed-ae58-47fc-8d80-e14a76a93050@roeck-us.net> On Thu, Jul 09, 2026 at 08:54:09AM -0700, Guenter Roeck wrote: > On Thu, Jul 09, 2026 at 09:54:22AM +0100, Nuno Sá wrote: > > > > > > Based on the MAX20912/16 specs on my hand, these chips do not support > > > PMBUS_PHASE (0x04). Furthermore, the spec only indicates support for VID mode > > > and does not provide m/b/r. Therefore, some of the features you mentioned might > > > be specific to the MAX20826 series. > > > > I see, phases are not supported using standard PMBUS. > > > > As mentioned in my other e-mail, it can still be supported by the driver. > That is what the chip drivers are for, after all. Ah and if it was not clear... The driver I have in hands do support reading phases. In fact we need a patch in the pmbus header to increase the max number of phases as, at least, max20826 supports up to 16 phases just in one rail (or 8 + 8) - Nuno Sá > > > > > > > Regarding enabling VOUT via GPIO, our platform handles this via the CPLD as > > > part of the hardware power sequencing. Managing this pin through the driver is > > > not a requirement for our system. > > > > But we cannot assume all systems will behave like the above. But now i > > do wonder about controlling the GPIOs in the driver. In your system you > > clearly did not need to do it. In mine (testing with a rpi) I had to > > use a GPIO (well I could have used hogs or pinctrl). But if you control the pin > > you do gain the ability to turn off the regulator. If you don't it's always on > > (which might be indeed the bulk of the real usecases for these systems). > > > Agreed. I don't really like it, but if the chip and some specific hardware > mandate it, it should be supported. However, that code also needs to be > tested - an untested implementation would be worse than no implementation. > > Note to anyone from Analog listening: It is really unfortunate that I, > as subsystem maintainer, do not have access to datasheets. That means I have > to rely on assumptions and can not really provide actionable feedback other > than guesswork based on the PMBus standard. That feedback may and likely > will miss essential details. > > Thanks, > Guenter