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[93.144.65.248]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47aa0f21328sm316945f8f.32.2026.07.03.09.05.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Jul 2026 09:05:35 -0700 (PDT) Date: Fri, 3 Jul 2026 18:05:32 +0200 From: Stefano Radaelli To: sashiko-reviews@lists.linux.dev Cc: devicetree@vger.kernel.org, Frank.Li@kernel.org, conor+dt@kernel.org, robh@kernel.org, imx@lists.linux.dev Subject: Re: [PATCH v1 1/1] arm64: dts: freescale: imx9-var-dart-sonata: fix Ethernet PHY configuration Message-ID: References: <20260703152731.236793-1-stefano.r@variscite.com> <20260703154139.8AF511F000E9@smtp.kernel.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260703154139.8AF511F000E9@smtp.kernel.org> Hi, On Fri, Jul 03, 2026 at 03:41:38PM +0000, sashiko-bot@kernel.org wrote: > > + regulator-always-on; > > + }; > [ ... ] > > @@ -139,9 +150,6 @@ mdio { > > ethphy1: ethernet-phy@1 { > > compatible = "ethernet-phy-ieee802.3-c22"; > > reg = <1>; > > [Severity: High] > Since the explicitly linked reset-gpios property was removed below, shouldn't > there be a corresponding phy-supply = <®_phy1_supply>; link here to maintain > the device link dependency? > > Without this link, fw_devlink no longer sees any dependency between the > Ethernet subsystem and the GPIO expander. Could the MAC driver probe and scan > the MDIO bus before the I2C GPIO expander (pca6408_2) and the new always-on > regulator are initialized, resulting in get_phy_device() failing with -ENODEV? I did try modelling this GPIO as a PHY supply using phy-supply, but that configuration does not work correctly on these boards. The PHY is still not detected reliably during boot. > [Severity: Medium] > Does this same reduction to a 10ms startup delay also risk initialization > failure here? > the startup-delay-us value is intentionally set to 10 ms. This delay reflects the enable timing of the board-level signal and is not intended to match the previous reset-deassert-us delay, as the signal is no longer being used as a reset. > > + regulator-always-on; > > + }; > [ ... ] > > @@ -180,9 +191,6 @@ mdio { > > ethphy1: ethernet-phy@1 { > > compatible = "ethernet-phy-ieee802.3-c22"; > > reg = <1>; > > [Severity: High] > Does this node also need a phy-supply = <®_phy1_supply>; property to prevent > the probe race condition described above? I did try modelling this GPIO as a PHY supply using phy-supply, but that configuration does not work correctly on these boards. The PHY is still not detected reliably during boot. > > > - reset-assert-us = <15000>; > > - reset-deassert-us = <100000>; > > - reset-gpios = <&pca6408_2 0 GPIO_ACTIVE_LOW>; > > > > leds { > > #address-cells = <1>; > [ ... ] > > diff --git a/arch/arm64/boot/dts/freescale/imx95-var-dart-sonata.dts b/arch/arm64/boot/dts/freescale/imx95-var-dart-sonata.dts > > index 7a58ad38ffb46..ccf7e77016e48 100644 > > --- a/arch/arm64/boot/dts/freescale/imx95-var-dart-sonata.dts > > +++ b/arch/arm64/boot/dts/freescale/imx95-var-dart-sonata.dts > [ ... ] > > @@ -346,9 +346,6 @@ &netc_emdio { > > ethphy1: ethernet-phy@1 { > > compatible = "ethernet-phy-ieee802.3-c22"; > > reg = <1>; > > [Severity: High] > Does this PHY node also require a phy-supply property to maintain its > dependency ordering after the reset-gpios removal? > I did try modelling this GPIO as a PHY supply using phy-supply, but that configuration does not work correctly on these boards. The PHY is still not detected reliably during boot. > > - reset-gpios = <&pca6408_2 0 GPIO_ACTIVE_LOW>; > > - reset-assert-us = <10000>; > > - reset-deassert-us = <100000>; > > > > leds { > > #address-cells = <1>; > > -- > Sashiko AI review · https://sashiko.dev/#/patchset/20260703152731.236793-1-stefano.r@variscite.com?part=1