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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf346d9af5sm50597925ad.54.2026.07.19.23.10.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Jul 2026 23:10:37 -0700 (PDT) Date: Sun, 19 Jul 2026 23:10:35 -0700 From: Qiang Yu To: Bjorn Andersson Cc: Michael Turquette , Stephen Boyd , Brian Masney , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Kees Cook , "Gustavo A. R. Silva" , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org, Krzysztof Kozlowski , Konrad Dybcio Subject: Re: [PATCH v9 0/7] clk: qcom: Add common clkref support and migrate Glymur and Mahua Message-ID: References: <20260713-tcsr_qref_0714-v9-0-373670ab15f9@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIwMDA2NiBTYWx0ZWRfX4XDaPOrGh4bs cJSeLwmo+B9Rj+rhnzuSPaOqs7rwtKZyQic6AQyUtHkG6yW3N07lj9ItKlhKWxmTuN9TVqIGpQ9 nrMFSKVXekZ8cNpBFZpLy8xgNZE+COI= X-Proofpoint-GUID: LzCsNAs22c2oZAhEadAdVdLroaHTY3t0 X-Proofpoint-ORIG-GUID: LzCsNAs22c2oZAhEadAdVdLroaHTY3t0 X-Authority-Analysis: v=2.4 cv=a+sAM0SF c=1 sm=1 tr=0 ts=6a5dbbdf cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=kj9zAlcOel0A:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=VwQbUJbxAAAA:8 a=zitRP-D0AAAA:8 a=EUspDBNiAAAA:8 a=bC-a23v3AAAA:8 a=K50iL3YY-BjGgPklzYcA:9 a=CjuIK1q_8ugA:10 a=GvdueXVYPmCkWapjIL-Q:22 a=xwnAI6pc5liRhupp6brZ:22 a=FO4_E8m0qiDe52t0p3_H:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIwMDA2NiBTYWx0ZWRfXySCXkPgHflKv WzZGu6YdPOt/ZLPtaxqDMmc4pOr2YCVEuiGvSYFd7vXBegsk1hyR6A6YBDA0glmOBL+egk4uQaQ b16x8gEeQtFaQNC4jrRJ3Xmw3BKKXxGnqzq1ULh3pnHuR6MRu6kD3o23HLVFcI4sEjlAzVjhHmQ W5Hve8fUXrrFiUPgXHmwcoaoVQvp6/eQ0OvBz/vlrN4NogN/whdtM/hmb0RdddtwcH18pg2k2Bp acPp8lMU5hH1aMkW9ynBhdhXLqGiHu4DiMvr/BIwkOOBjz5rGgwnSmHl+4AcCN3M/GPQdPfanlV 6GAll2O1reRRSPIcCneciV65waSvyv5HF1+Ge9q2al9KpOhwb9c4dgSIPyJl2zXZB3gvzTA9vS1 /+/qoSRpHs5AvowS6Z6pGpckscyhfYX4y5HZ7a/rFr64KeU8xI3ki9u9oJG8/ZSwJ9Jb2VOexWM 8ODRhiueWWRkclssnNQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-19_08,2026-07-17_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 clxscore=1015 impostorscore=0 malwarescore=0 spamscore=0 phishscore=0 priorityscore=1501 lowpriorityscore=0 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607200066 On Sat, Jul 18, 2026 at 04:52:34PM -0500, Bjorn Andersson wrote: > On Mon, Jul 13, 2026 at 09:59:35PM -0700, Qiang Yu wrote: > > This series adds a common clkref_en implementation and converts glymur > > and mahua to use it, along with the related binding and DTS updates. > > > > The PCIe clkref clocks on Glymur and Mahua gate the QREF block which > > provides reference clocks to the PCIe PHYs. QREF requires LDO supplies > > and a reference voltage from the refgen block to operate. The refgen > > block itself requires vdda-refgen_0p9 and vdda-refgen_1p2 LDOs to > > function. > > > > Previously, these QREF votes were done in PHY drivers. In earlier > > discussion [1], the feedback was that this is the wrong ownership point: > > those supplies are for the QREF controlled by clkref registers, not for > > the PHY directly. Based on that feedback, this series keeps the > > regulator handling with the clkref control path. > > > > Another reason for this series is reuse. clkref_en registers may live in > > different blocks across platforms (for example TCSR on Glymur, TLMM on > > SM8750 [2]), while the behavior is the same. The common helper lets each > > driver provide simple descriptors (name, offset, optional supplies) and > > reuse shared registration and runtime logic. > > > > Glymur and Mahua share the same QREF TX/RPT/RX component naming but > > have different PCIe QREF topologies. Both are handled in tcsrcc-glymur.c > > via match_data to select the correct descriptor table per compatible. > > > > [1] https://lore.kernel.org/lkml/aEBfV2M-ZqDF7aRz@hovoldconsulting.com/ > > [2] https://lore.kernel.org/linux-arm-msm/20260202-topic-8750_tcsr-v1-0-cd7e6648c64f@oss.qualcomm.com/ > > > > Changes in v9: > > - Add reviewed-by tags, no code change. > > - Link to v8: https://lore.kernel.org/all/20260708-tcsr_qref_0708-v8-0-62c42b5fa269@oss.qualcomm.com/ > > > > Changes in v8: > > - Define refs with __counted_by(num_refs) and make provider a single allocation > > - Use mahua_tcsr_tx1_rpt012_rx2_regulators for PCIe6. > > - Link to v7: https://lore.kernel.org/all/20260702-tcsr_qref_0702-v7-0-776f2811b7af@oss.qualcomm.com/ > > > > Changes in v7: > > - Define compatible as an enum and add the per-compatible allOf/if/then block upfront for glymur. Reword commit msg for patch1 > > - Drop Krzysztof's Reviewed-by since the patch changed substantially from what he reviewed. > > - Added a comment noting that on Mahua the REFGEN4 block is supplied by the vdda-refgen3-* regulators, and mentioned this in the commit message for patch2. > > - Change the descriptor array to an array of pointers (const struct qcom_clk_ref_desc * const *). Skip unpopulated indices with if (!desc) > > - Convert tcsr_cc_glymur_clk_descs[] and tcsr_cc_mahua_clk_descs[] to a pointer array. > > - Add regulator lists for clkref_en on Mahua. > > - Null-check device_get_match_data() result in probe. > > - Add rx0 regulator in mahua tcsr node > > - Squashed the former patch 8 (switch pcie5_phy ref clock to RPMH_CXO_CLK) into patch7, so Mahua PCIe probes at every commit. > > - Link to v6: https://lore.kernel.org/all/20260621-tcsr_qref_0622-v6-0-c939c22ded0c@oss.qualcomm.com/ > > > > Changes in v6: > > - Split dt-bindings patch into two: one to move glymur-tcsr to its own > > binding file, and one to add mahua support > > - Use regmap_set_bits()/regmap_clear_bits() instead of regmap_update_bits() > > in clk-ref.c > > - Move clk_init_data from struct qcom_clk_ref to a stack variable in > > qcom_clk_ref_register() > > - Add Co-developed-by/Reviewed-by tags from Konrad Dybcio > > - Add missing regulator supplies for EDP and USB clkref_en on glymur > > - Link to v5: https://patch.msgid.link/20260602-tcsr_qref_0527-v5-0-8ea174a59d7e@oss.qualcomm.com > > > > Changes in v5: > > - Return 0 if regmap_read fail > > - Add a separate file for glymur-tcsr and mahua-tcsr > > - Link to v4: https://patch.msgid.link/20260527-tcsr_qref_0527-v4-0-ded83866c9d9@oss.qualcomm.com > > > > Changes in v4: > > - Add mahua QREF support (binding, driver, DTS) to avoid dtb check error > > - Override pcie5_phy ref clock to RPMH_CXO_CLK on mahua since > > TCSR_PCIE_1_CLKREF_EN is not available > > - Rename regulator arrays to topology-based names and merge duplicates > > - Remove else: false blocks from binding > > - Sort supply properties alphabetically in binding and DTS > > - Link to v3: https://lore.kernel.org/all/20260506-qref_vote_0506-v3-0-5ab71d2e6f16@oss.qualcomm.com/ > > > > Changes in v3: > > - Fix dtb check error: allOf:0: 'then' is a dependency of 'if'. > > - Link to v2: https://lore.kernel.org/all/20260420-vote_qref_in_tcsrcc-v2-0-589a23ae640a@oss.qualcomm.com/ > > > > Changes in v2: > > - RFC tag dropped > > - Changed back to additionalProperties: false > > - Moved all Glymur supply properties into top-level properties so they are explicitly defined. > > - Link to v1: https://lore.kernel.org/all/20260331-qref_vote-v1-0-3fd7fbf87864@oss.qualcomm.com/ > > > > Signed-off-by: Qiang Yu > > --- > > Qiang Yu (7): > > dt-bindings: clock: qcom: Move glymur TCSR to own binding > > dt-bindings: clock: qcom,glymur-tcsr: Add mahua support > > clk: qcom: Add generic clkref_en support > > clk: qcom: tcsrcc-glymur: Add regulator supplies and migrate to clk_ref helper > > clk: qcom: tcsrcc-glymur: Add Mahua QREF regulator support > > arm64: dts: qcom: glymur: Add QREF regulator supplies to TCSR > > arm64: dts: qcom: mahua: Add QREF regulator supplies to TCSR > > > > .../bindings/clock/qcom,glymur-tcsr.yaml | 146 +++++++ > > .../bindings/clock/qcom,sm8550-tcsr.yaml | 2 - > > arch/arm64/boot/dts/qcom/glymur-crd.dts | 20 + > > arch/arm64/boot/dts/qcom/mahua-crd.dts | 16 + > > arch/arm64/boot/dts/qcom/mahua.dtsi | 13 + > > drivers/clk/qcom/Makefile | 1 + > > drivers/clk/qcom/clk-ref.c | 205 +++++++++ > > drivers/clk/qcom/tcsrcc-glymur.c | 471 +++++++++++---------- > > include/linux/clk/qcom.h | 67 +++ > > 9 files changed, 704 insertions(+), 237 deletions(-) > > --- > > base-commit: 3da905eb243cad56200f09bb7eaa060537aed0cc > > I was hoping to apply this series, but I don't have this commit and > patch 4 ("migrate to clk_ref helper") doesn't apply to my tree. > > What did you base this on? Why don't you test your changes on latest > mainline or linux-next? > > Please rebase and test on a relevant branch. Sorry for the trouble, I based v9 on next-20260713, but I forgot to drop this patch https://lore.kernel.org/all/20260420133616.88740-2-krzysztof.kozlowski@oss.qualcomm.com/, which is a dependency for another series I'm working on, before running b4 prep -n. I can git am v9 cleanly onto latest linux-next (next-20260717), but I'm not sure if that's the branch you apply against. Could you confirm which branch I should rebase onto, so I don't run into the same issue again? - Qiang Yu