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From: Wojciech Dubowik <wojciech.dubowik@mt.com>
To: sashiko-reviews@lists.linux.dev
Cc: dri-devel@lists.freedesktop.org, imx@lists.linux.dev,
	devicetree@vger.kernel.org, Frank.Li@kernel.org, robh@kernel.org,
	conor+dt@kernel.org
Subject: Re: [PATCH v3 2/2] dt-bindings: display: sn65dsi83: Add output data-lanes
Date: Fri, 10 Jul 2026 11:10:46 +0200	[thread overview]
Message-ID: <alC3Fnzyy-C92sLA@mt.com> (raw)
In-Reply-To: <20260710083425.B7EB11F000E9@smtp.kernel.org>

On Fri, Jul 10, 2026 at 08:34:25AM +0000, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] Mismatch between device tree schema and driver implementation for the `data-lanes` property.
> --
> 
> --- Patch [2]: [PATCH v3 2/2] dt-bindings: display: sn65dsi83: Add output data-lanes ---
> commit 98aea58cd5128c6a4b72efd4a5f9ec088fd30dca
> Author: Wojciech Dubowik <Wojciech.Dubowik@mt.com>
> 
> dt-bindings: display: sn65dsi83: Add output data-lanes
> 
> This commit adds an optional output LVDS data lanes property with two allowed
> values. It supports the standard layout <1 2 3 4> and reversed layout <4 3 2 1>
> for output channels.
> 
> > diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
> > index e69b6343a8ebb..4431f113bb9cd 100644
> > --- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
> > +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
> > @@ -86,10 +86,52 @@ properties:
> >          description: Video port for LVDS Channel-A output (panel or bridge).
> >          $ref: '#/$defs/lvds-port'
> >  
> > +        properties:
> > +          data-lanes:
> > +            $ref: /schemas/types.yaml#/definitions/uint32-array
> 
> [Severity: Medium]
> Does this schema change place data-lanes at the correct level in the
> device tree hierarchy?
> 
> The schema defines data-lanes as a direct property of the port node,
> but standard OF graph rules and the driver implementation parse it from the
> endpoint node:

This is valid comment. While testing dt bindings I have put data-lanes property
on the wrong level. It should in under endpoint and not in main node.

I will fix it in v4

> 
> drivers/gpu/drm/bridge/ti-sn65dsi83.c:sn65dsi83_parse_lvds_endpoint() {
>     ...
>     ret_data = of_property_read_u32_array(endpoint, "data-lanes", data_lanes,
>                     ARRAY_SIZE(data_lanes));
>     ...
> }
> 
> Because the driver reads from the endpoint node rather than the port node,
> will it silently fail to find the configuration and fall back to the default
> layout on affected hardware?
> 
> > +            description: |
> > +              Array of physical LVDS data lane indexes
> > +            oneOf:
> 
> [ ... ]
> 
> -- 
> Sashiko AI review · https://sashiko.dev/#/patchset/20260710082630.394040-1-wojciech.dubowik@mt.com?part=2

      reply	other threads:[~2026-07-10  9:10 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20260710082630.394040-1-wojciech.dubowik@mt.com>
2026-07-10  8:26 ` [PATCH v3 0/2] drm/bridge: ti-sn65dsi83: Add reverse lvds lanes support Wojciech Dubowik
2026-07-10  8:26 ` [PATCH v3 1/2] drm/bridge: ti-sn65dsi83: Add reversed " Wojciech Dubowik
2026-07-10  8:37   ` sashiko-bot
2026-07-10  8:26 ` [PATCH v3 2/2] dt-bindings: display: sn65dsi83: Add output data-lanes Wojciech Dubowik
2026-07-10  8:34   ` sashiko-bot
2026-07-10  9:10     ` Wojciech Dubowik [this message]

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