From: Ananthu C V <ananthu.cv@oss.qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Cc: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org
Subject: Re: [PATCH v5 2/3] arm64: dts: qcom: fix SoCCP memory mappings for Glymur
Date: Fri, 17 Jul 2026 01:42:14 -0700 [thread overview]
Message-ID: <alnq5tDRRJWbloaS@hu-anancv-lv.qualcomm.com> (raw)
In-Reply-To: <9e0ea6cf-ec91-4017-a14d-a1f7c4921f37@oss.qualcomm.com>
Hi Konrad,
On Thu, Jul 16, 2026 at 05:16:56PM +0200, Konrad Dybcio wrote:
> On 7/7/26 12:12 PM, Ananthu C V wrote:
> > The currently listed SoCCP and SoCCP DTB reserved memory regions
> > don't align with the memory requested by the SoCCP Firmware. Fix
> > this by updating the SoCCP/SoCCP DTB memory regions to reflect the
> > memory region requirements of the SoCCP firmware, as described in
> > the Glymur v21 memory map release.
> >
> > Signed-off-by: Ananthu C V <ananthu.cv@oss.qualcomm.com>
> > ---
> > arch/arm64/boot/dts/qcom/glymur.dtsi | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> > index 20b49af7298e..9ec7c256b80a 100644
> > --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
> > @@ -602,13 +602,13 @@ spss_region_mem: spss@88a00000 {
> > no-map;
> > };
> >
> > - soccpdtb_mem: soccpdtb@892e0000 {
> > - reg = <0x0 0x892e0000 0x0 0x20000>;
> > + soccp_mem: soccp@88e00000 {
> > + reg = <0x0 0x88e00000 0x0 0x400000>;
> > no-map;
> > };
> >
> > - soccp_mem: soccp@89300000 {
> > - reg = <0x0 0x89300000 0x0 0x400000>;
> > + soccpdtb_mem: soccpdtb@89200000 {
> > + reg = <0x0 0x89200000 0x0 0x20000>;
> > no-map;
> > };
>
> The updated regions point to "SOCCP Boot [DTB]", whereas the old
> regions point to "SOCCP [DTB]". I'm assuming HLOS potentially loading
> FW to the boot regions is fine?
The reason why there are two seperate memory regions for SoCCP is because of
some Hyper-V limitations not allowing HLOS to reuse the memory regions from
pre-HLOS context for SoCCP. This is a windows specific issue. KVM is not
limited by this, so we are able to reuse the same memory regions loaded by
the bootloader in HLOS context as well, and do not require two seperate
memory regions.
> Konrad
Best,
Ananthu
next prev parent reply other threads:[~2026-07-17 8:42 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-07 10:12 [PATCH v5 0/3] Add remoteproc PAS loader for SoCCP on Glymur DT Ananthu C V
2026-07-07 10:12 ` [PATCH v5 1/3] remoteproc: qcom: pas: add needs_tzmem flag to trigger shmbridge creation Ananthu C V
2026-07-09 7:11 ` Mukesh Ojha
2026-07-07 10:12 ` [PATCH v5 2/3] arm64: dts: qcom: fix SoCCP memory mappings for Glymur Ananthu C V
2026-07-09 7:14 ` Mukesh Ojha
2026-07-09 12:01 ` Ananthu C V
2026-07-16 15:16 ` Konrad Dybcio
2026-07-17 8:42 ` Ananthu C V [this message]
2026-07-07 10:12 ` [PATCH v5 3/3] arm64: dts: qcom: add SoCCP DT node " Ananthu C V
2026-07-07 10:25 ` sashiko-bot
2026-07-09 7:18 ` Dmitry Baryshkov
2026-07-09 12:15 ` Ananthu C V
2026-07-09 12:11 ` Ananthu C V
2026-07-16 14:49 ` Konrad Dybcio
2026-07-17 8:46 ` Ananthu C V
2026-07-10 18:07 ` (subset) [PATCH v5 0/3] Add remoteproc PAS loader for SoCCP on Glymur DT Bjorn Andersson
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