Re: [PATCH v9 4/7] staging: fpga manager: add sysfs interface document

atull
2015-07-24T12:39:15Z

On Fri, 24 Jul 2015, Pavel Machek wrote:

Hi Pavel,

Thanks for your your feedback in cleaning up these docs.

> Hi!
>
> > +What: /sys/class/fpga_manager/<fpga>/state
> > +Date: July 2015
> > +KernelVersion: 4.2
> > +Contact: Alan Tull <atull@opensource.altera.com>
> > +Description: Read fpga manager state as a string.
>
> fpga->FPGA.

Yep

>
> > + Valid states may vary by manufacturer; superset is:
> > + * unknown = can't determine state
> > + * power off = FPGA power is off
> > + * power up = FPGA reports power is up
> > + * reset = FPGA held in reset state
> > + * firmware request = firmware class request in progress
> > + * firmware request error = firmware request failed
> > + * write init = FPGA being prepared for programming
> > + * write init error = Error while preparing FPGA for
> > + programming
> > + * write = FPGA ready to receive image data
> > + * write error = Error while programming
> > + * write complete = Doing post programming steps
> > + * write complete error = Error while doing post programming
> > + * operating = FPGA is programmed and operating
>

If I can make my intent clear, maybe we can figure out what will be most
useful here.

The intent is to provide enough detail that if something goes wrong with
the FPGA programming (something that the driver can't take care of) then
userspace can know that. Such as if the firmware request fails, that
could be due to not being able to find the firmware file.

> This will need some more details. "firmware request" is hardly a
> hardware state, does it belong here?

This is a superset of FPGA states and fpga manager driver states as the
fpga manager driver is walking through the steps to get the FPGA into
a known operating state. So it's a sequence, though some steps may get
skipped. If there is an error, then userspace can know what step failed.

Maybe this should be separated into fpga_state for hardware state and
fpga_mgr_status (to report what step of progress the fpga manager driver
is at during programming). I want this to be useful and still not be
device (FPGA) specific.

> Is power off or on while firmware
> is being requested?

On. It's a sequence.

> How does the fpga get into power up phase?
> Normally, you'd only power it on to do something more with it...?
>
> Pavel

>
> --
> (english) http://www.livejournal.com/~pavelmachek
> (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
>