Re: [PATCH v16 0/6] Device Tree support for FPGA programming

Rob Herring
2016-02-11T21:22:52Z

On Thu, Feb 11, 2016 at 2:49 PM, atull <atull@opensource.altera.com> wrote:
> On Fri, 5 Feb 2016, atull@opensource.altera.com wrote:
>
>> From: Alan Tull <atull@opensource.altera.com>
>>
>> v16 Refactors the FPGA Area and FPGA Bus into single thing called an
>> FPGA Region and eliminates using simple-bus. I'm using the word
>> "region" as it's a term is used in the literature of both the major
>> FPGA manufacturors.
>>
>> Changes for v16:
>> * Refactor the FPGA Area and FPGA Bus into a FPGA Region.
>> * Don't use simple-bus.
>> * FPGA Managers and FPGA Bridges are now specified by phandle using the
>> "fpga-mgr" and "fpga-bridges" properties. fpga-bridges can specify
>> more than one bridge.
>> * Device Tree overlays should be targeted to a FPGA Region.
>> * The overlays need only contain firmware-name and the child nodes.
>> * To model a system containing >1 partial reconfiguration region,
>> an overlay could add FPGA Regions to the base FPGA Regions.
>> * Child FPGA Regions inherit the parent FGPA Manager, but specify
>> their own set of bridges if needes as partial reconfig regions
>> will likely need their own bridges.
>> * All this is discussed in bindings/fpga/fpga-region.txt
>>
>> One other highlight:
>> The little engine that runs this thing is a reconfig notifier
>> in fpga-region.c. This notifier that will program an FPGA if a
>> "firmware-name" property gets added to a fpga-region. Then
>> it will call of_platform_populate(). The current behavior in Linux
>> when a DT overlay is applied is that the reconfig notifications
>> go out in heirarchical order: first notifications are for the
>> properties, then notifications for the child nodes. So an overlay
>> that adds a 'firmware-name' property and some child nodes to a
>> fpga-region will cause FPGA programming and child node
>> populating in the right order.
>
> I figured out how to get rid of the reconfig notifier.
>
>>
>> One issue with the dynamic DT stuff:
>> I've tried returning and error from the notifier if FPGA programming
>> fails; the error is noted on the console, but the child nodes
>> get probed anyway.
>
> I looked into it further and now I've got a solution for this issue
> that I can post soon. I can stop using the DT overlay configfs
> interface and add a sysfs file for applying an overlay to an FPGA
> region. The FPGA region implementation will see the overlay before it
> becomes part of the live tree. Then it can do the FPGA programming
> and see that succeed before the child nodes become part of the live
> tree. If FPGA programming fails, the overlay will be rejected before
> it becomes part of the live tree. By the time 'firmware-name' and the
> child nodes show up in the live tree, they will be post-configuration
> information.

Um, no. We don't need 2 interfaces for loading overlays from
userspace. I could see this being a common problem and it needs to be
solved. But given the configfs interface is not upstream yet, perhaps
you should worry about that after the current series is in.

Perhaps we need a pre-add notifier and the core will only load the
overlay if nothing handles it. Really, a solution without notifiers
would be preferred. Maybe register handlers with the DT core for
certain paths.

Rob