From: matthew.gerlach@linux.intel.com
To: Anatolij Gustschin <agust@denx.de>
Cc: atull@kernel.org, moritz.fischer@ettus.com,
linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com
Subject: Re: [PATCH v5 4/4] fpga pr ip: Platform driver for Altera Partial Reconfiguration IP.
Date: Mon, 20 Mar 2017 16:42:56 -0700 (PDT) [thread overview]
Message-ID: <alpine.DEB.2.20.1703201634030.2531@mgerlach-VirtualBox> (raw)
In-Reply-To: <20170318192750.716e9b28@crub>
On Sat, 18 Mar 2017, Anatolij Gustschin wrote:
> Hi Matthew,
>
Hi Anatolij,
Thanks for all the feedback. I will create another patch set
incorporating your suggestions.
> On Fri, 10 Mar 2017 11:40:27 -0800
> matthew.gerlach@linux.intel.com matthew.gerlach@linux.intel.com wrote:
>
> ...
>> +#include "altera-pr-ip-core.h"
>
> Shouldn't we put this header to include/linux? Compiling the
> out-of-tree modules using alt_pr_register/alt_pr_unregister
> will not work if this header is in drivers/fpga.
I was not sure if someone would want to access these functions outside of
drivers/fpga. I think it does make sense to move it to
include/linux/fpga.
>
> ...
>> +
>> +module_platform_driver(alt_pr_platform_driver);
>
> Please add MODULE_LICENSE("GPL v2") here. Otherwise, when built as
> a module it cannot be loaded because the alt_pr register/unregister
> functions are exported as GPL only. Also please add module author
> and description.
>
Got it. Thanks!
> Thanks,
>
> Anatolij
> --
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>
next prev parent reply other threads:[~2017-03-20 23:42 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-10 19:40 [PATCH v5 0/4] Altera Partial Reconfiguration IP matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
[not found] ` <1489174827-6033-1-git-send-email-matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-03-10 19:40 ` [PATCH v5 1/4] fpga: add config complete timeout matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
[not found] ` <1489174827-6033-2-git-send-email-matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-03-13 20:46 ` Moritz Fischer
2017-03-10 19:40 ` [PATCH v5 2/4] fpga pr ip: Core driver support for Altera Partial Reconfiguration IP matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
[not found] ` <1489174827-6033-3-git-send-email-matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-03-13 20:49 ` Moritz Fischer
2017-03-21 21:04 ` Anatolij Gustschin
2017-03-22 16:08 ` matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
2017-03-22 16:39 ` Anatolij Gustschin
2017-03-18 18:53 ` Anatolij Gustschin
2017-03-20 23:49 ` matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
2017-03-10 19:40 ` [PATCH v5 3/4] fpga dt: bindings " matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
[not found] ` <1489174827-6033-4-git-send-email-matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-03-13 20:47 ` Moritz Fischer
2017-03-10 19:40 ` [PATCH v5 4/4] fpga pr ip: Platform driver " matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
2017-03-13 20:48 ` Moritz Fischer
2017-03-18 18:27 ` Anatolij Gustschin
2017-03-20 23:42 ` matthew.gerlach [this message]
2017-03-13 20:46 ` [PATCH v5 0/4] " Moritz Fischer
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