Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support

[matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org]

On Sun, 24 Sep 2017, Marek Vasut wrote:

> On 09/24/2017 03:27 PM, Vignesh R wrote:
>>
>>
>> On 9/24/2017 6:42 PM, Marek Vasut wrote:
>>> On 09/24/2017 03:08 PM, Vignesh R wrote:
>>>>
>>>>
>>>> On 9/24/2017 5:31 PM, Marek Vasut wrote:
>>>>> On 09/24/2017 12:59 PM, Vignesh R wrote:
>>>>>> Add pm_runtime* calls to cadence-quadspi driver. This is required to
>>>>>> switch on QSPI power domain on TI 66AK2G SoC during probe.
>>>>>>
>>>>>> Signed-off-by: Vignesh R <vigneshr-l0cyMroinI0@public.gmane.org>
>>>>>
>>>>> Are you planning to add some more fine-grained PM control later?
>>>>
>>>> Yes, I will need to add fine-grained PM control at some point. But, for
>>>> now SoC does not really support low power mode or runtime power saving
>>>> option.
>>>> The fact that driver still uses clk_prepare_*() calls to enable/disable
>>>> clocks instead of pm_*() calls makes it a bit tricky though.
>>>>
>>>> Just figured out I forgot to add cleanup code in error handling path of
>>>> probe(). Will fix that and send a v4.
>>>
>>> OK, fine. Cleanups are welcome. The SoCFPGA doesn't do much runtime PM
>>> either, so it's fine for now.
>>>
>>
>> Ok thanks! Do you know if pm_runtime_get_sync() can enable clocks for
>> QSPI on SoCFPGA or if clk_prepare_enable() is needed? Just trying to see
>> if its possible to get rid of clk_*() calls in favor of pm_*() calls.
>
> Not of the top of my head, sorry. +CC Matthew, he should know.

I am not an expert at the clock framework nor the power management, but I
did ask around a bit.  No one I asked was planning to change the clk_*()
calls to pm_*() call, but the feedback was that it would be a good idea.

Matthew Gerlach


>
> -- 
> Best regards,
> Marek Vasut
>
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