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Tue, 28 Jul 2026 15:15:53 -0700 (PDT) Date: Wed, 29 Jul 2026 06:15:43 +0800 From: Inochi Amaoto To: Junhui Liu , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Yixun Lan , Inochi Amaoto , Samuel Holland , Anup Patel , Guodong Xu Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, Conor Dooley , Inochi Amaoto Subject: Re: [PATCH RFC 7/7] riscv: dts: spacemit: k3: Add ACLINT MSWI and MTIMER nodes Message-ID: References: <20260729-k3-aclint-v1-0-aef88614d3a5@pigmoral.tech> <20260729-k3-aclint-v1-7-aef88614d3a5@pigmoral.tech> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260729-k3-aclint-v1-7-aef88614d3a5@pigmoral.tech> On Wed, Jul 29, 2026 at 12:36:33AM +0800, Junhui Liu wrote: > The SpacemiT K3 SoC provides ACLINT MSWI and MTIMER controllers. Add > these nodes to complete the ACLINT description in the Device Tree for > M-mode firmware such as OpenSBI. > > Signed-off-by: Junhui Liu > --- > arch/riscv/boot/dts/spacemit/k3.dtsi | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/spacemit/k3.dtsi > index 5fb719f79467..ecb5f4fcd8fd 100644 > --- a/arch/riscv/boot/dts/spacemit/k3.dtsi > +++ b/arch/riscv/boot/dts/spacemit/k3.dtsi > @@ -1303,5 +1303,24 @@ maplic: interrupt-controller@f1800000 { > riscv,num-sources = <512>; > status = "reserved"; > }; > + > + aclint_mswi: interrupt-controller@f1810000 { > + compatible = "spacemit,k3-aclint-mswi", "riscv,aclint-mswi"; > + reg = <0x0 0xf1810000 0x0 0x4000>; > + interrupts-extended = <&cpu0_intc 3>, <&cpu1_intc 3>, > + <&cpu2_intc 3>, <&cpu3_intc 3>, > + <&cpu4_intc 3>, <&cpu5_intc 3>, > + <&cpu6_intc 3>, <&cpu7_intc 3>; > + }; > + > + aclint_mtimer: timer@f1814000 { > + compatible = "spacemit,k3-aclint-mtimer", "riscv,aclint-mtimer"; > + reg = <0x0 0xf1814000 0x0 0x8000>; > + reg-names = "mtimecmp"; > + interrupts-extended = <&cpu0_intc 7>, <&cpu1_intc 7>, > + <&cpu2_intc 7>, <&cpu3_intc 7>, > + <&cpu4_intc 7>, <&cpu5_intc 7>, > + <&cpu6_intc 7>, <&cpu7_intc 7>; > + }; > }; > }; > > -- > 2.55.0 > Squash this patch into the previous one, it is the same device. Regards, Inochi