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[73.183.53.213]) by smtp.gmail.com with ESMTPSA id 00721157ae682-81fb87315cdsm14274757b3.0.2026.07.30.10.38.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jul 2026 10:38:10 -0700 (PDT) Date: Thu, 30 Jul 2026 13:38:08 -0400 From: Brian Masney To: Stefan =?iso-8859-1?Q?D=F6singer?= Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Vinod Koul , Neil Armstrong , Russell King , Lee Jones , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, mfd@lists.linux.dev Subject: Re: [PATCH v8 05/12] clk: zte: Add Clock registration infrastructure Message-ID: References: <20260727-zx29clk-v8-0-7a107b00f1dd@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/2.4.0 (2026-06-19) Hi Stefan, On Wed, Jul 29, 2026 at 12:25:34AM +0300, Stefan Dösinger wrote: > Thanks for the review! > > Am Dienstag, 28. Juli 2026, 16:53:17 Ostafrikanische Zeit schrieben Sie: > > Looking into the other patches. There's more mixing of the clk provider > > calling the clk consumer APIs here. It looks like this just takes a > > reference and holds them. Would moving to parent_data address this? > > I think so. parent_data::fw_name is indeed something I have been looking for > and didn't stumble across myself. And I suspect when you say "use > parent_data", you don't mean "use parent_data.name everywhere". > > But it raises the question of how to handle internal clocks, e.g. foo_gate- > >foo_div->foo_mux->clock-26m. Only "clock-26m" is passed through the DT and > found via fw_name, and only foo_gate is exported. > > For the other clocks I currently rely on the string matching to resolve the > parent named in the static init data to an actual registered clk_hw. The > alternative I see is storing the struct clk_hw * in a table by index and pass > it in parent_data.hw, but that'd require managing the extra indices. Or build > a clock-local name->clk_hw lookup, but then I am just reinventing the old name > matching. > > Am I missing something obvious? Is there a canonical implementation somewhere > that implements modern best practices? I learned that looking at existing > drivers isn't always a reliable guide. You'll want to register all of the clocks with the subsystem. Take a look at drivers/clk/qcom/gcc-sa8775p.c and here's an example I picked at random that shows how you can reference the parents with the parent_data: static const struct clk_parent_data gcc_parent_data_8[] = { { .index = DT_BI_TCXO }, { .hw = &gcc_gpll7.clkr.hw }, { .index = DT_RXC1_REF_CLK }, { .hw = &gcc_gpll0_out_even.clkr.hw }, }; static struct clk_rcg2 gcc_emac1_rgmii_clk_src = { ... .clkr.hw.init = &(const struct clk_init_data){ .name = "gcc_emac1_rgmii_clk_src", .parent_data = gcc_parent_data_8, .num_parents = ARRAY_SIZE(gcc_parent_data_8), .ops = &clk_rcg2_shared_ops, }, }; Brian