On Tue, Jul 21, 2026 at 10:29:47AM +0200, Herve Codina (Schneider Electric) wrote:
> The Renesas RZ/N1 timer block controller is the controller in charge of
> timers available in the Renesas RZ/N1 SoCs family.
> 
> This controller handles 8 timers:
>  - 6 16-bit timers
>  - 2 32-bit timers
> 
> Signed-off-by: Herve Codina (Schneider Electric) <herve.codina@bootlin.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

In general:

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

One nit:

> +        reg = <0x51001000 0x400>;

Isn't 0x400 a bit excessive? The last documented register in my docs is
0x114, so maybe 0x200 will do above?