Re: [PATCH 2/3] PCI: imx6: Use the external clock as REF_CLK when needed for i.MX8MQ

[Rudi Heitbaum <rudi@heitbaum.com>]

On Thu, Aug 06, 2026 at 04:53:31PM -0400, Frank Li wrote:
> On Sun, Aug 02, 2026 at 11:49:27AM +0000, sashiko-bot@kernel.org wrote:
> > Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> > - [High] The patch breaks backward compatibility with existing i.MX8MQ device trees by changing the default reference clock source, causing PCIe initialization to fail.
> > --
> >
> > --- Patch [2]: [PATCH 2/3] PCI: imx6: Use the external clock as REF_CLK when needed for i.MX8MQ ---
> > commit 6f37370c304d3692e11e97087dc50e68e2389b9e
> > Author: Rudi Heitbaum <rudi@heitbaum.com>
> >
> > PCI: imx6: Use the external clock as REF_CLK when needed for i.MX8MQ
> >
> > This commit updates the i.MX8MQ PCIe PHY initialization to conditionally
> > select the external oscillator as the reference clock based on the
> > enable_ext_refclk flag. It falls back to the internal PLL if an "extref"
> > clock is not supplied.
> >
> > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> > > index 98e1db751132a..9e3b64fecb451 100644
> > > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > > @@ -445,11 +445,16 @@ static int pcie_phy_write(struct imx_pcie *imx_pcie, int addr, u16 data)
> > >
> > >  static int imx8mq_pcie_init_phy(struct imx_pcie *imx_pcie)
> > >  {
> > > -	/* TODO: This code assumes external oscillator is being used */
> > > +	bool ext = imx_pcie->enable_ext_refclk;
> > > +
> > > +	/*
> > > +	 * Select the off-chip oscillator as REF_CLK when an "extref" clock is
> > > +	 * supplied, otherwise fall back to the internal PLL.
> > > +	 */
> > >  	regmap_update_bits(imx_pcie->iomuxc_gpr,
> > >  			   imx_pcie_grp_offset(imx_pcie),
> > >  			   IMX8MQ_GPR_PCIE_REF_USE_PAD,
> > > -			   IMX8MQ_GPR_PCIE_REF_USE_PAD);
> > > +			   ext ? IMX8MQ_GPR_PCIE_REF_USE_PAD : 0);
> >
> > [Severity: High]
> > Will this change break backward compatibility with existing i.MX8MQ device
> > trees?
> 
> This is problem.  enable_ext_refclk is good direction to align imx95. but
> need find way to avoid break backward compatibility.
> 
> Frank

Thanks for looking into this.

The difficulty is that on i.MX8MQ the absence of "extref" is ambiguous. It
means "existing devicetree, reference on the pad", and I was also using it
to mean "this board drives REF_CLK from the internal PLL".

Align with i.MX95, how would you prefer the internal-PLL case to be 
described?

The only consumer is a follow-up, "arm64: dts: imx8mq-phanbell: Enable
pcie0 and pcie1" from the "arm64: dts: imx8mq-phanbell: Google Coral Dev
Board enablement" series - so I am happy to create a 2/3 whichever way you
suggest.

Rudi

> > Looking at imx8mq_pcie_init_phy() in drivers/pci/controller/dwc/pci-imx6.c,
> > if a legacy device tree does not provide a clock named "extref",
> > imx_pcie->enable_ext_refclk evaluates to false.
> >
> > This causes the driver to clear IMX8MQ_GPR_PCIE_REF_USE_PAD and fall back to
> > the internal PLL. On boards that previously relied on the unconditional
> > external oscillator selection, this regression will cause PCIe initialization
> > to fail.
> >
> > --
> > Sashiko AI review · https://sashiko.dev/#/patchset/cover.1785669457.git.rudi@heitbaum.com?part=2