On Fri, Aug 21, 2026 at 02:10:40PM +0000, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> 
> Pre-existing issues:
> - [High] Concurrent lockless read and write of `rtc->tm_alarm` and a race with delayed IRQ handlers can cause a newly configured alarm to be silently disabled.
> --
> 
> --- Patch [6]: [PATCH v5 06/17] rtc: rzn1: Disable alarm interrupt before reprogramming alarm registers ---
> commit 6227942d78d91abfb1648a64bce64f0011716b61
> Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> rtc: rzn1: Disable alarm interrupt before reprogramming alarm registers
> 
> This commit updates rzn1_rtc_set_alarm() to disable the alarm interrupt
> before reprogramming the alarm registers. This prevents the interrupt from
> firing while the alarm registers contain a mixture of old and newly written
> values.
> 
> > diff --git a/drivers/rtc/rtc-rzn1.c b/drivers/rtc/rtc-rzn1.c
> > index 44e8db466cb78..09631a3a51345 100644
> > --- a/drivers/rtc/rtc-rzn1.c
> > +++ b/drivers/rtc/rtc-rzn1.c
> > @@ -280,6 +280,11 @@ static int rzn1_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
> >  	if (alarm > farest)
> >  		return -ERANGE;
> >  
> > +	/* Disable alarm interrupts before reprogramming the alarm. */
> > +	ret = rzn1_rtc_alarm_irq_enable(dev, 0);
> > +	if (ret)
> > +		return ret;
> > +
> >  	writel(bin2bcd(tm->tm_min), rtc->base + RZN1_RTC_ALM);
> >  	writel(bin2bcd(tm->tm_hour), rtc->base + RZN1_RTC_ALH);
> >  	writel(BIT(tm->tm_wday), rtc->base + RZN1_RTC_ALW);
> 
> [Severity: High]
> This is a pre-existing issue, but does this fully protect against a race
> with a delayed IRQ handler?

I'll leave it to you but I think this should also be handled
incrementally.