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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-14df3bb4a2fsm2427281c88.8.2026.09.30.19.34.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Sep 2026 19:35:01 -0700 (PDT) Date: Thu, 1 Oct 2026 08:04:51 +0530 From: Vishnu Saini To: Philipp Zabel Cc: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marek Vasut , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Yi Zhang , Nilesh Laad , Gopi Botlagunta , venkata.valluru@oss.qualcomm.com, Jessica Zhang Subject: Re: [PATCH v9 2/2] drm/bridge: add support for lontium lt9211c bridge Message-ID: References: <20260924-add-lt9211c-bridge-v9-0-d78b39677a61@oss.qualcomm.com> <20260924-add-lt9211c-bridge-v9-2-d78b39677a61@oss.qualcomm.com> <61aa851b26f9aa85a3ec1dc4bc8f46d7f1fbd24e.camel@pengutronix.de> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Proofpoint-GUID: R83fccFUww-2k6wBYXUNt3wuhfcmWkH3 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDAxMDAxMCBTYWx0ZWRfX7xWEVWrfhHHv ohrebiWsRAslKOzRh6TtjE4GlRBOaXC+KEb3phKzUo88E+VGV+LLUxSBAKPQGngugR7naKWazuC dC0zj0dasmnNrvNqIbUFgw0Xiq5FhNSKdtZ/6vX7YTZBcpfb4OK0Hk/Fn4D5PkVD8T8pZk5woVE U8zGWbt7SVoiaZKg+QajS5LnvjqUhOcBfdE+apPRxrIpSP7sFn0wdKp/EZsQLPe/rx8K2GaGxfJ a6BK0bRhKsSI+5/Bq3OCir7qGY4XGthEuQ+978sKPCkQ7wSfZeG8Dl97onVPi/+RW3SQdShbv05 rSaa3I3XwrCY9/7JPWhUFV/WjPfbKgNOLHP5ZMRIRWrKBwHOoDIo8hycsGotRVuSNribmsoGlJA SWErCq9eVKw3LSqA0S34/hqA/xrEAJ+q7jYranOWHKSjYAu7E9z6QSJW96HIYaTEnGWLVfJWJmH arl1WyNzKL4t+5A71wA== X-Authority-Analysis: v=2.4 cv=MZn5KJ/f c=1 sm=1 tr=0 ts=6abdc6d8 cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=kj9zAlcOel0A:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=jvwfOezYHQUHBwXlzkIA:9 a=CjuIK1q_8ugA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDAxMDAxMCBTYWx0ZWRfX+vbRTQTluoBD RBIEXNZhVAE2Q8yU4flq18YD4glphbV+wMEbdt2//4W4WiwaYIS4B3Z2vDXGJH+RMLba78LpufA /9DvSInWrAjh2F0cRGh5/TbfJJUcDVM= X-Proofpoint-ORIG-GUID: R83fccFUww-2k6wBYXUNt3wuhfcmWkH3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-01_01,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 spamscore=0 suspectscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 impostorscore=0 adultscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2610010010 On Mon, Sep 28, 2026 at 12:13:42PM +0200, Philipp Zabel wrote: > On Fr, 2026-09-25 at 15:23 +0200, Philipp Zabel wrote: > > On Do, 2026-09-24 at 21:29 +0530, vishnu.saini@oss.qualcomm.com wrote: > > > From: Yi Zhang > > > > > > LT9211C is a Single/Dual-Link DSI/LVDS or Single DPI input to > > > Single-Link/Dual-Link DSI/LVDS or Single DPI output bridge chip. > > > Extend the existing lontium-lt9211 driver to support DSI-to-LVDS > > > bridge configuration by detecting and handling both LT9211 and LT9211C > > > variants from a single driver. > > > > > > Chip detection in lt9211_read_chipid() is extended to identify the > > > LT9211C by its distinct chip ID registers, and cross-checked against > > > the chip type requested by the DT compatible string to catch a > > > mismatched board/compatible combination. > > > > > > Add LT9211C-specific regmap support and use lt9211_chip_data with > > > i2c_get_match_data() to provide per-chip configuration. > > > > > > Five new functions implement the LT9211C DSI-to-LVDS initialisation > > > sequence: lt9211c_configure_rx(), lt9211c_autodetect_rx(), > > > lt9211c_configure_timing(), lt9211c_configure_plls() and > > > lt9211c_configure_tx(). > > > > > > Defer the remaining LT9211C initialization to a work item scheduled > > > from atomic_enable(), since RX auto-detection requires an active DSI > > > stream. > > > > This is still wrong, and I don't understand why you need it. > > > > All scheduling initialization as a work item should allow is for > > downstream bridges and/or panels to be atomic_enabled while > > lt9211_work_func() is waiting for a vblank interrupt. > > They expect the LVDS signal to be active at this point. If LVDS is > > enabled at some unknown later point in time by the work item, any > > startup timing requirements the panel might have can not be applied > > correctly. > > > > Also, deferring initialization as a work item shouldn't have any > > influence on the upstream DSI signal. That should already be active > > when lt9211c atomic_enable is called. Could it be that there is a bug > > in your display controller or DSI bridge driver that causes the DSI > > signal to still not be completely active at this point? > > > > > Signed-off-by: Yi Zhang > > > Signed-off-by: Nilesh Laad > > > Signed-off-by: Gopi Botlagunta > > > Signed-off-by: Vishnu Saini > > > Tested-by: Philipp Zabel > > > > I have not tested this version (yet). > > I have now retested this on RK3576 - both as-is and with the > "drm/bridge: lt9211: drop delayed work" patch I just sent. Thank you i will see how atomic_enable is handled in RK3576 > I still think we have to figure out why the DSI signal doesn't appear > to be streaming as it should when lt9211_atomic_enable is called in > your setup. > When enabling the lt9211c synchronously, is there any error? > Is just the Sot/RX: debug output incorrect? Yes, few details were mentioned in our v6 discussion. droping delayed work is not working as expected. lt9211_autodetect_rx failed to read the format, Tried increasing the delay upto 3s before reading the format buf, did not help: With synchronous approach, i defined a dummy drm hook, hw_enable_timing which is called after enabling the timing engine in drm/msm dsi host driver, and it starts working (bridge configuration was synchronously but in this dummy drm hook). So to remove delayed work, changes required in dsi host driver. Shall i defer bridge level atomic_enable callback from drm/msm/dsi host till timing engine is enabled? > Which display controller / DSI bridge drivers are used to send the DSI > signal? I used drm/msm/dsi host driver on qcom lemans/kodiak/monaco evk platforms. > regards > Philipp