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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33e6129b37csm3678940eec.15.2026.09.22.01.13.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2026 01:13:05 -0700 (PDT) Date: Tue, 22 Sep 2026 16:12:58 +0800 From: Shawn Guo To: Krishna Chaitanya Chundru Cc: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Bjorn Andersson , Maxime Chevallier , Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: Re: [PATCH v4 6/6] phy: qcom: qmp-pcie: Add Nord Gen5x16 PCIe multi-PHY support Message-ID: References: <20260921-nord-v4-0-ed05c6e09240@oss.qualcomm.com> <20260921-nord-v4-6-ed05c6e09240@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260921-nord-v4-6-ed05c6e09240@oss.qualcomm.com> X-Proofpoint-ORIG-GUID: yicCshiUcTMAV6rq-dMFXkVk73HvuZa8 X-Proofpoint-GUID: yicCshiUcTMAV6rq-dMFXkVk73HvuZa8 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIyMDExNiBTYWx0ZWRfX5RkxOJoq58rS xkOOeFezEtudXgf8Mm9nu6AapEQ5IMErMSzZy94zwBoM6s/6IufNmDG5HNq8luQSp7dUpnIVTFG YYx+K64pvxGHmS99hJT+9R1EnYM53uI= X-Authority-Analysis: v=2.4 cv=NKBAaE6g c=1 sm=1 tr=0 ts=6ab23893 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=Y4sVft1UDeOkrP7wHAgA:9 a=CjuIK1q_8ugA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIyMDExNiBTYWx0ZWRfXyYrTIrvpiO47 R+AbyDY2bVC8IzDPGQzRlmOMuHGvMAu7BleXlV5ntPVA7Z+HS+8pDiH8jV5rkf2QmI/ZrQ4WsVs 7XRHZvw5RnSXDP4+nYW1x8b1j8ncp59ZMzC4TCJf3f+QHw2jdjNSin1ujuN2FmCk2IJoWPsqJpF e+JViQN/vBXjpo4eGAfWUs9ZFioREwO/TTz1hZnab59Mr1Jy7YzNZonRC28YCsux13/2nNZkX4O JrTPaL746DHpRPBjVseoSzqLsdD8G5bcP1ahqcyJh4k221G0ShFbXKc9wd02EdKZURxKAmzmHu+ neiKbueXzx87XL9sQIsrZE1bXYabVZD3+YkmKBIiY4iCV3ArXd14MhlHCekapFBO9O3Ih9yx7fR 55br3kC3a4+F/8qwtMaFG/W0jUlt9L4Q8yFZdkU/Z1/UuhS33XndBkOYqIG62TSW2DjRem3583i tjIS2iaW+T0CnzICGsw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-21_07,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 suspectscore=0 adultscore=0 malwarescore=0 clxscore=1015 phishscore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609220116 On Mon, Sep 21, 2026 at 11:07:14AM +0530, Krishna Chaitanya Chundru wrote: > Add support for the Nord Gen5x16 bifurcated QMP PCIe PHY. > > Nord has a single PCIe PHY block split into four ports which can be > used in multiple lane configurations: x16, x8+x8, x8+x4+x4 and > x8+x4+x2+x2. The active topology is selected through the link mode > configuration register, and the driver exposes the corresponding PHY > instances based on that mode. > > Unlike Glymur, where the PHY is initialized by firmware, Nord requires > Linux to program the PHY registers. Add the PLL, TXRXZ, PCS and PCS > lane initialization tables, along with the required power-up, > power-down and soft-reset sequencing. > > Add per-port and grouped PHY configurations for all supported Nord > lane modes. Also add support for regular PHY resets in addition to the > NOCSR reset. > > Signed-off-by: Krishna Chaitanya Chundru Reviewed-by: Shawn Guo