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Wed, 23 Sep 2026 07:03:20 -0700 (PDT) Date: Wed, 23 Sep 2026 19:33:09 +0530 From: Mohd Ayaan Anwar To: Coia Prant Cc: Maxime Chevallier , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Serge Semin , Andrew Lunn , Heiner Kallweit , Russell King , Richard Cochran , Bjorn Andersson , Konrad Dybcio , Alexandre Torgue , Giuseppe Cavallaro , Jose Abreu , Maxime Coquelin , Jan Petrous , "Jose.Abreu@synopsys.com" , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Lorenzo Bianconi , Shawn Guo , Zhangfei Gao , Jitendra Vegiraju , Alex Elder , Daniel Thompson Subject: Re: [PATCH RFC net-next 0/9] net: introduce Qualcomm XPCS support and add Nord Ethernet plumbing Message-ID: References: <20260923-qcom_xpcs_nord_emac-v1-0-4b1c682af70f@oss.qualcomm.com> <5135e15d-b6ac-476c-9a7d-b7d64e4eed5c@bootlin.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIzMDA1NSBTYWx0ZWRfX+Viz/zTvhvYy gjsT4FG2YODJxtW9ti83p/9rZwQLKMiGdgxk7+TAZ/Rzy1I5q6qevBsJPA7UTSqt2p2Zdbi+BZT D8TtMLteP1bQaD6bOpnoFhWy7KdAlpE= X-Proofpoint-GUID: cZVsfZuuL_sY9arYxuzB34eKeqBoCu4- X-Authority-Analysis: v=2.4 cv=RYMFmFtv c=1 sm=1 tr=0 ts=6ab3dc2a cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8 a=ee_2aqc6AAAA:8 a=dR3U5T3Y49Kxp-nVN2AA:9 a=CjuIK1q_8ugA:10 a=OpyuDcXvxspvyRM73sMx:22 a=VOpmJXOdbJOWo2YY3GeN:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIzMDA1NSBTYWx0ZWRfX9pRP76v7mbK8 5X4VwnluVMQ/vXUZiXejCamImD/+y/Z3V5wGcExWXbJNpQCTXEvhIKZYefADk5FJlt7iNQlh80/ DdI0ux/TBztm0gr+zcXykUagPVd/0K22ODBC99PfDkyVYQu4/rGP94atH9nwd4L/whpi4uPHEgB LTThioa4dr00R4OgeKOm17fIyAw+VHlO6RK2/mSCEBA2vg5XRIGs5EVlAvFoU0+OTOY7kJtyxmg 6p1LOU5EUmxXu5qgPwkQ4mdne9yNbhbcR2s75Njpt5PfTvNfFWqiYtwFcCgMSRo7Hm9+q+3Mcgo Q9esA1X9et5cNIDNWuTooYDHDX/a286I60IwfRf6rffCVMIkV9cg1H9QYlnyrRd/nDBh5mMcBTD 9qyN3L6fc+h5ZbTONEGi/PUyEbEIcwlFQTXbLeWHptz7mKgOpyfm1qiGdGpODMjE5rNDBKhqSkz d/V9dp7h/WrLKJ5ClTA== X-Proofpoint-ORIG-GUID: cZVsfZuuL_sY9arYxuzB34eKeqBoCu4- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-23_04,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 clxscore=1015 priorityscore=1501 phishscore=0 adultscore=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609230055 On Wed, Sep 23, 2026 at 09:17:44PM +0800, Coia Prant wrote: > Hello, > > Thanks for the RFC. A few comments. > > XPCS_ID > ------- > Is 0x00000030 documented for Qualcomm, or is it derived from > NXP_SJA1110_XPCS_ID + 0x10? If it's the latter, it's a magic value and > I'd rather see it confirmed against the Qualcomm documentation or a > register dump from real hardware before it's used for platform > identification. > It's the latter (NXP XPCS ID + 0x10). The Qualcomm hardware returns the standard XPCS identifier (0x7996ced0) upon reading the 3.2, 3.3 PCS_DEV_ID registers. I tried following a similar approach to the NXP DSA driver of reporting a synthetic value to bind to the Qualcomm part. All this was just to make it work with pcs-xpcs-plat without introducing a ton of code. > Structure > --------- > pcs-xpcs-plat is itself a platform glue driver, for SoCs that don't > need any platform-specific handling. Adding another abstraction layer > on top of it to cover Qualcomm would be glue on glue. Generic, Qualcomm > and Rockchip differ in power management, address window size (2M vs 8M, > ...) and MMD redirection, so they don't share a probe path. > > Pushing that into pcs-xpcs-plat would also drag every existing user of > the generic glue along: they would suddenly depend on GENERIC_PHY, > PM_GENERIC_DOMAINS and whatever else the Qualcomm path needs, or they > would have to carry per-platform branches in a driver that is supposed > to be platform-agnostic. A per-SoC-family glue driver, the same way > dwmac-intel, dwmac-rk, dwmac-renesas-gbeth and dwmac-rzn1 are > separate, keeps each integration self-contained and leaves the generic > glue alone. > > Would it make sense to take that route here? My pcs-xpcs-rk does the > MMD redirection through a custom MDIO bus; maybe the Qualcomm glue can > reuse that idea directly instead of extending pcs-xpcs-plat. Happy to > help with the generic parts if that's useful. > I agree with your concerns regarding the glue on glue architecture. I also don't know if each platform glue should define a custom MDIO bus with similar logic. Maybe we can have a generic abstraction for it? I know that Alex had a patch introducing pcs-xpcs-regmap.c [1]. My original code for this platform actually built on top of it before I moved to the current implementation. At least I now know that multiple vendors have an MMIO based XPCS, albeit with differing MMD redirection mechanisms. I am going through the pcs-xpcs-rk patch and the eee_clk already stood out to me. On my board, the PCS link does not come up if the EEE clock is stopped. Going through the databook, I did find a barebones explanation of why that might be happening for USXGMII, but I need to dig more into it. Thank you for the review. Ayaan [1] https://lore.kernel.org/netdev/20260501155421.3329862-2-elder@riscstar.com/