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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-87fea884749sm1325581b3a.27.2026.09.25.08.35.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Sep 2026 08:35:10 -0700 (PDT) Date: Fri, 25 Sep 2026 23:35:03 +0800 From: Shawn Guo To: Abel Vesa Cc: Bjorn Andersson , Abel Vesa , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Taniya Das , Jagadeesh Kona , Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/3] arm64: dts: qcom: glymur: Add videocc sleep clock Message-ID: References: <20260924161152.1162301-1-shengchao.guo@oss.qualcomm.com> <20260924161152.1162301-3-shengchao.guo@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Proofpoint-ORIG-GUID: TrnXp_lMfBmIYqv8oaWmjAMPNsqUoP7R X-Proofpoint-GUID: TrnXp_lMfBmIYqv8oaWmjAMPNsqUoP7R X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI1MDA2MiBTYWx0ZWRfXzqhhUfrj1jFh BYBpi7M/HlvkJ6jDhpYG85u8DkZgX1Ur40ONXqw4C+1t6gHb6m3pv4q7hUUue5vw2TxjmYaXUVn FqjLn8DvRrSwx81UAApCRUJk2NIeAMQ= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI1MDA2MiBTYWx0ZWRfXyGnmxa6QTaL1 qmDW1MGN/VDG81EjiFdklxKM9IzQ8FV6Zt5MOIfgx7EoliPM+y4lpIhjuYPXNYfM48jFaRQGbB5 eupl41aXtI06rWyTokJOLMo2FKPgm+uTHGeLfAV7Owp+lqD36j5oXGe4C00xNqnotyET2k95p01 5Qx5oS0TrihZtSNDcvFkeG99VwhQRCq0HQ75sbcz62wPVsq2KZ7SH/vdxCxu4ajviKpBXr5xGrk Ch9+46D72cpjRLpUgBYvJkwun42crNATTr3AQ9mQKcbOfgRh0hOK+Dv/WAXwD1lbbHZr/OwfTmA rDfewFKIS97yYWQVCKcp8wcNd4LnVrL5fSiE9XWJzsoh+BxuzsZPoWcufqrixkJtH7gLQl9JLsA I7JTrHTkOCPzY8h2ttlDd2vmdomUheI5I5K4nqgrz0VEe0Bfg7fRMO+h5H+i1rpM1FPm5aKoX/k H0JDoARwCYy5euffKhw== X-Authority-Analysis: v=2.4 cv=eNmGH3p1 c=1 sm=1 tr=0 ts=6ab694b1 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=XM2o5SXsTojDuVAecT4A:9 a=CjuIK1q_8ugA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-25_02,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 lowpriorityscore=0 phishscore=0 clxscore=1015 spamscore=0 bulkscore=0 impostorscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609250062 On Fri, Sep 25, 2026 at 12:48:07PM +0300, Abel Vesa wrote: > On 26-09-25 00:11:51, Shawn Guo wrote: > > The videocc node supplies only the two XO inputs. videocc-glymur.c > > expects a third input, DT_SLEEP_CLK, and uses it as the parent of > > video_cc_sleep_clk_src, so that RCG cannot resolve its parent and ends > > up as an orphan clock: any clk_set_rate() on it fails, and it shows up > > parentless in /sys/kernel/debug/clk/clk_summary. > > > > Nothing is broken at runtime today because VIDEO_CC_SLEEP_CLK (0x8138) > > is listed in video_cc_glymur_critical_cbcrs and is therefore force > > enabled through regmap, bypassing the clock framework; the sleep source > > simply keeps whatever rate the bootloader left. The orphan still blocks > > any future rate management of the video sleep path. > > > > Pass the board sleep clock as the third input. The sibling evacc node > > on the same SoC already does this. > > Same question as on the 3rd patch. This patch doesn't drop GCC_VIDEO_AHB_CLK or any videocc input clock like 3rd patch but only adding the board sleep clock as the third input. So it shouldn't break videocc either. It would nice if you can give it a test on your X2 laptop though :) Shawn