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Wed, 14 Oct 2026 04:20:31 -0700 (PDT) Received: from hu-arakshit-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2e8422b8202sm65198165ad.51.2026.10.14.04.20.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Oct 2026 04:20:30 -0700 (PDT) Date: Wed, 14 Oct 2026 16:50:22 +0530 From: Abhinaba Rakshit To: Kuldeep Singh Cc: Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , Adrian Hunter , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neeraj Soni , Harshal Dev , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v12 1/6] soc: qcom: ice: Add OPP-based clock scaling support for ICE Message-ID: References: <20260824-enable-ice-clock-scaling-v12-0-09271f583dc6@oss.qualcomm.com> <20260824-enable-ice-clock-scaling-v12-1-09271f583dc6@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE0MDA0NSBTYWx0ZWRfX3jX5+LGuR+Gr ALTb/xJFSILd4l7CV8xzKXWDhgNcwOLUJ7Kw0JQF5YkOZXJTyijPUeDYq+DB7S4Qxul+0J9WKPN sjRmEcF7H5SM0kmj/4TGuVm/q5HzLrQWd0HHZHbzGq8AwEbJsbv8UMedy8Ow7Vsxt3hNPrzK4n0 DdFjecy3tN+1ukOJooqThZYqFKkiSI+ycsASMFX98vVA9eoXZ/5Kaa8MAjmUAhPQ+axrQ9wgtN1 uEXw5ZenhgpTrJBARoYny3CONAtaMxdo2za//ikqlj57kvUjKqgmba/R0/EfWF0dAG5BJyK9am+ IzvL3yFxjiffMO41vZEJQ6lx683BV7Sm5Gkt0QJQnzzOL2HRe37RAnrtH2VrkoDoUmATc+V16S2 2Pq2kMLm3jJVrGB5bj0A4kFW7Au80xuPZAOSwAHQAOxmqbfeZwnCTO3ID8XbH4chS6IBkel+/cH i5+AnpOgzc+gV/F95jw== X-Proofpoint-GUID: sq0dW4fRAzg3aZzW9OCYFEcABVee-g1- X-Authority-Analysis: v=2.4 cv=P6avFSAu c=1 sm=1 tr=0 ts=6acf6581 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=kj9zAlcOel0A:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=2_FpPSLQlo5LL2co86MA:9 a=CjuIK1q_8ugA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-ORIG-GUID: sq0dW4fRAzg3aZzW9OCYFEcABVee-g1- X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE0MDA0NSBTYWx0ZWRfX4r7Poc3mL61T GNdGlH155ITdbycoaR9ykBukapvlO4gZrDTuLgh9WI8NuiWsiCedtXTk/FTWwoB5vfOEpXfxqMu z2N1S4JzAznz7+SddIGi0nXJSLlf0eg= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-13_01,2026-10-09_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 suspectscore=0 clxscore=1015 impostorscore=0 malwarescore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610140045 On Fri, Aug 28, 2026 at 02:41:50AM +0530, Abhinaba Rakshit wrote: > On Thu, Aug 27, 2026 at 12:17:02PM +0530, Kuldeep Singh wrote: > > On 24-08-2026 01:17, Abhinaba Rakshit wrote: > > > Register optional operation-points-v2 table for ICE device > > > during device probe. Attach the OPP-table with only the ICE > > > core clock. Since, dtbinding is on a transition phase to include > > > iface clock and clock-names, attaching the opp-table to core clock > > > remains optional such that it does not cause probe failures. > > > > iface clock and corresponding dtbindings are merged for v7.3 and your > > change will land post that. > > We can drop this from commit message? > > > > I think we should scale only core clock and for iface clock should rely > > on ufs/eMMC controller maitained frequency. > > > > The idea here is to scale only the core clock and I am achieving it by using > dev_pm_opp_set_clkname() API. However, for that clock-names needs to be as > required property under DT bindings for qcom ICE. > > As the comment mentioned here: https://lore.kernel.org/all/b32c7091-b2c4-443d-b58e-759b471f67db@oss.qualcomm.com/, > the current dtbindings supports backward compatibility with iface being optional, > hence it is expected that driver should be backward compatible as well. > Once, we plan to break this backward compatibility and make iface clock and > clock-names property as required, we can say its out of transitional phase. Kuldeep, I hope this answers your query. Can you please let me know, if anything pending in this patch? Abhinaba Rakshit