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It is > implemented as part of the chip configuration registers CHIP_CTRL13/14/15, > which route peripheral DMA requests to the physical channels of the CMC > DMA controller. > > Document this as a DMA router. The #dma-cells = <3> specifier contains > the peripheral request ID, the target CMC DMA channel, and channel > configuration flags forwarded to the parent DMA controller. > > Acked-by: Conor Dooley > Signed-off-by: Binbin Zhou > --- Reviewed-by: Frank Li > .../dma/loongson,ls2k0300-dmamux.yaml | 72 +++++++++++++++++++ > MAINTAINERS | 2 + > .../dt-bindings/dma/loongson,ls2k-dmamux.h | 53 ++++++++++++++ > 3 files changed, 127 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dma/loongson,ls2k0300-dmamux.yaml > create mode 100644 include/dt-bindings/dma/loongson,ls2k-dmamux.h > > diff --git a/Documentation/devicetree/bindings/dma/loongson,ls2k0300-dmamux.yaml b/Documentation/devicetree/bindings/dma/loongson,ls2k0300-dmamux.yaml > new file mode 100644 > index 000000000000..df607d9ff599 > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/loongson,ls2k0300-dmamux.yaml > @@ -0,0 +1,72 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/loongson,ls2k0300-dmamux.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Loongson-2 APB DMA MUX (DMA request router) > + > +maintainers: > + - Binbin Zhou > + > +allOf: > + - $ref: /schemas/dma/dma-router.yaml# > + > +properties: > + compatible: > + const: loongson,ls2k0300-dmamux > + > + reg: > + maxItems: 1 > + > + '#dma-cells': > + const: 3 > + description: | > + Each cell represents the following: > + 1. Peripheral request ID: This describes the corresponding bit field > + for that peripheral in the configuration register; see ( > + include/dt-bindings/dma/loongson,ls2k-dmamux.h) for details. > + 2. Physical DMA channel (0-7): This not only represents the DMA > + channel used by the peripheral but is also converted into a value for > + the corresponding bit field in the configuration register, indicating > + the legitimacy of that peripheral using that channel. > + Specifically: > + - I2S/SPI/UART/I2C: Require adjacent channels in pairs; valid > + values are 0/1, 2/3, 4/5, 6/7; > + - SM3/SM4/DES/AES: Single channel; valid values are limited to 0/1; > + - CAN/ADC: Single channel; valid values range from 0 to 7. > + 3. DMA Channel Configuration: A 32-bit mask used to specify > + device-specific DMA channel configurations. > + - Bit 6: Peripheral Address Increment Mode > + 0x0: Disabled > + 0x1: Enabled > + - Bit 7: Memory Address Increment Mode > + 0x0: Disabled > + 0x1: Enabled > + - Bits 12-13: Priority > + 0x0: Low > + 0x1: Medium > + 0x2: High > + 0x3: Very High > + > + dma-requests: > + const: 22 > + > +required: > + - compatible > + - reg > + - dma-requests > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include > + dma-router@16000134 { > + compatible = "loongson,ls2k0300-dmamux"; > + reg = <0x16000134 0xc>; > + #dma-cells = <3>; > + dma-masters = <&dma>; > + dma-requests = <22>; > + }; > +... > diff --git a/MAINTAINERS b/MAINTAINERS > index 42f5165019ee..78622b255f88 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -15351,9 +15351,11 @@ M: Binbin Zhou > L: dmaengine@vger.kernel.org > S: Maintained > F: Documentation/devicetree/bindings/dma/loongson,ls2k0300-dma.yaml > +F: Documentation/devicetree/bindings/dma/loongson,ls2k0300-dmamux.yaml > F: Documentation/devicetree/bindings/dma/loongson,ls2x-apbdma.yaml > F: drivers/dma/loongson/loongson2-apb-cmc-dma.c > F: drivers/dma/loongson/loongson2-apb-dma.c > +F: include/dt-bindings/dma/loongson,ls2k-dmamux.h > > LOONGSON LS2X I2C DRIVER > M: Binbin Zhou > diff --git a/include/dt-bindings/dma/loongson,ls2k-dmamux.h b/include/dt-bindings/dma/loongson,ls2k-dmamux.h > new file mode 100644 > index 000000000000..1e2907ab069d > --- /dev/null > +++ b/include/dt-bindings/dma/loongson,ls2k-dmamux.h > @@ -0,0 +1,53 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Loongson-2 SoC DMA Mux dt-bindings > + * > + * DMA specifier format: > + * dmas = <&dma_mux >; > + * > + * The cell selects a physical CMC DMA channel (0-7) > + * For peripherals using channel pairs (UART, I2C, SPI2/3, I2S), > + * the channel number selects the pair: 0/1 -> pair 0, 2/3 -> pair 1, > + * 4/5 -> pair 2, 6/7 -> pair 3. > + * > + * Copyright (C) 2026 Loongson Technology Corporation Limited > + */ > + > +#ifndef _DT_BINDINGS_DMA_LOONGSON_LS2K_DMAMUX_H > +#define _DT_BINDINGS_DMA_LOONGSON_LS2K_DMAMUX_H > + > +/* UART controllers */ > +#define LS2K0300_DMA_UART0 0 > +#define LS2K0300_DMA_UART1 1 > +#define LS2K0300_DMA_UART2 2 > +#define LS2K0300_DMA_UART3 3 > +#define LS2K0300_DMA_UART4 4 > +#define LS2K0300_DMA_UART5 5 > +#define LS2K0300_DMA_UART6 6 > +#define LS2K0300_DMA_UART7 7 > +#define LS2K0300_DMA_UART8 8 > +#define LS2K0300_DMA_UART9 9 > + > +/* I2C controllers */ > +#define LS2K0300_DMA_I2C0 10 > +#define LS2K0300_DMA_I2C1 11 > +#define LS2K0300_DMA_I2C2 12 > +#define LS2K0300_DMA_I2C3 13 > + > +/* SPI controllers (IO mode) */ > +#define LS2K0300_DMA_SPI2 14 > +#define LS2K0300_DMA_SPI3 15 > + > +/* I2S controller */ > +#define LS2K0300_DMA_I2S 16 > + > +/* ADC controller */ > +#define LS2K0300_DMA_ADC 17 > + > +/* CAN-FD controllers */ > +#define LS2K0300_DMA_CAN0 18 > +#define LS2K0300_DMA_CAN1 19 > +#define LS2K0300_DMA_CAN2 20 > +#define LS2K0300_DMA_CAN3 21 > + > +#endif /* _DT_BINDINGS_DMA_LOONGSON_LS2K_DMAMUX_H */ > -- > 2.52.0 >