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[79.21.165.229]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a1fc0b42bdsm59333825e9.0.2026.10.21.08.33.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Oct 2026 08:33:10 -0700 (PDT) Date: Wed, 21 Oct 2026 17:33:08 +0200 From: Carlo Caione To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, David Lechner , Julien Stephan Subject: Re: [PATCH v2] arm64: dts: mediatek: mt8390-genio-common: add boot phase tags Message-ID: References: <20260730-ccaione-upstream-mt8390-bootph-v2-1-82f67feadf7a@baylibre.com> X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260730-ccaione-upstream-mt8390-bootph-v2-1-82f67feadf7a@baylibre.com> On Thu, Jul 30, 2026 at 10:04:41 +0100, Carlo Caione wrote: > U-Boot SPL runs after the platform DDR loader has initialized DRAM on > the Genio 510 and Genio 700 EVKs. It needs the debug UART and eMMC > controller, together with their clock, syscon, pinctrl, interrupt and > watchdog providers, to load the firmware FIT. > > Mark the nodes consumed by the current SPL configuration with > 'bootph-pre-ram' so that the canonical devicetree carries the boot-phase > information and bootloaders do not need local overrides. > > Signed-off-by: Carlo Caione Gentle ping on this once more. thanks, -- Carlo Caione