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[95.246.144.141]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4b7efb1547fsm3329295e9.11.2026.11.06.11.34.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Nov 2026 11:34:41 -0800 (PST) Date: Fri, 6 Nov 2026 20:34:37 +0100 From: Carlo Caione To: Conor Dooley Cc: Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Jerome Brunet , Kevin Hilman , Martin Blumenstingl , Jian Hu , Chuan Liu , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 6/7] dt-bindings: clock: Add Amlogic S7 peripherals clock controller Message-ID: References: <20261106-upstream-s7-clk-v1-0-7d501d62621f@baylibre.com> <20261106-upstream-s7-clk-v1-6-7d501d62621f@baylibre.com> <20261106-unwilling-preoccupy-156dbb310448@spud> X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261106-unwilling-preoccupy-156dbb310448@spud> On Fri, Nov 06, 2026 at 17:34:14 +0100, Conor Dooley wrote: > > + #include > > + #include > > + > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + clock-controller@0 { > > + compatible = "amlogic,s7-peripherals-clkc"; > > + reg = <0x0 0x0 0x0 0x49c>; > > What's with the weird numbers in this example? > > Examples don't have to be real, but when it looks like this the > immediate thought is that the modelling of the device might be > incorrec.t The numbers are actually real, but the example simply lost their context because I copied the node from the S7 dtsi (not yet submitted), where the controller sits under the APB bus node (bus@fe000000) and the bus ranges make the addresses relative to it. apb: bus@fe000000 { compatible = "simple-bus"; reg = <0x0 0xfe000000 0x0 0x480000>; #address-cells = <2>; #size-cells = <2>; ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; clkc_periphs: clock-controller@0 { compatible = "amlogic,s7-peripherals-clkc"; reg = <0x0 0x0 0x0 0x49c>; #clock-cells = <1>; ... In V2 I'll use an absolute address for the sake of clarity (PLL has the same issue). Thanks, -- Carlo Caione