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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36a4291e38fsm18933983eec.15.2026.10.31.05.20.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Oct 2026 05:20:22 -0700 (PDT) Date: Sat, 31 Oct 2026 20:20:16 +0800 From: Shawn Guo To: Konrad Dybcio Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Deepti Jaggi , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Nikunj Kela , Shazad Hussain , Bartosz Golaszewski Subject: Re: [PATCH v2 7/7] arm64: dts: qcom: lemans: Enable lemans-sa8255p-ride board support Message-ID: References: <20261015023711.721837-1-shengchao.guo@oss.qualcomm.com> <20261015023711.721837-8-shengchao.guo@oss.qualcomm.com> <45b54ff8-a2a6-4eaf-9d5b-cfd9bb40c459@oss.qualcomm.com> X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <45b54ff8-a2a6-4eaf-9d5b-cfd9bb40c459@oss.qualcomm.com> X-Proofpoint-ORIG-GUID: YiHuVKjKpry66UCXmOs1SVmPFEvzdT3f X-Proofpoint-GUID: YiHuVKjKpry66UCXmOs1SVmPFEvzdT3f X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDMxMDA0OSBTYWx0ZWRfX4gFPD6r83RmS qsCp881tSQ3LYxjJjcoIBBHoI4mT6zu3qsrEKIrrKshaL2eSDwA1RdRT8plRix+1NArt63Aty9s zz7+I2wxMbKhSfM4Ux2x3PO80evlUFPgNkJpc+6EoCDjV29Z2wbPKYzDkut2yhcwG5uIcA71fTB cghVHZjAlhMhOXfOUEsOGxCf1rP5kng2NfOkp3WQBHXyCdylYFt27P1F217uNqSscqz2bX4qPMm 31IB3ZVp3ae26E7OOqf1d45igluebqrkkliUQTR4hDHc23eYSJMG/dx5oSSooJIpA7GvkPE+85e 6UExfiuYEbGBeeE2qjVrTcZrEuNBTdaom02qyTO1YfX/FdROm0BW58R448wy7u5Ga5iq97KST6n t7BLIF3pjYYWfosI2mg3//ORfkYmrZlL+FNN1gkalHPrLid/y+RJMPcTDy7x5CGRdrNmRp3iTGL GnSl8iFRatKr/egsUbQ== X-Proofpoint-Spam-Info: AW1haW4tMjYxMDMxMDA0OSBTYWx0ZWRfX/k5tgOMAuOQ0 j0JwOGtKeHahIWFn4gjCrO4t23D6JOHTgm8mkHBMFs1CKHJ10uaqg/+PEJyY6GVp1WUVh1MbzSs REB0pATiF6kC21vy3sB6bmKCGa9MgmE= X-Authority-Analysis: v=2.4 cv=cfVHPXDM c=1 sm=1 tr=0 ts=6ae5dd0d cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=kj9zAlcOel0A:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=7v2nZd0nDHYtio1KbugA:9 a=CjuIK1q_8ugA:10 a=bBxd6f-gb0O0v-kibOvt:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-31_02,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 adultscore=0 priorityscore=1501 spamscore=0 bulkscore=0 suspectscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610300000 definitions=main-2610310049 On Tue, Oct 20, 2026 at 02:16:27PM +0200, Konrad Dybcio wrote: > On 10/15/26 4:37 AM, Shawn Guo wrote: > > From: Nikunj Kela > > > > Add initial device tree support for the Lemans SA8255P Ride board. Enable > > UFS storage, UART10 as the serial console, PCIe EP interfaces, thermal > > zones for PMM8654AU sensors, and SCMI protocol nodes. > > > > Co-developed-by: Shazad Hussain > > Signed-off-by: Shazad Hussain > > Signed-off-by: Nikunj Kela > > Co-developed-by: Deepti Jaggi > > Signed-off-by: Deepti Jaggi > > Reviewed-by: Bartosz Golaszewski > > Signed-off-by: Shawn Guo > > --- > > [...] > > > + thermal-zones { > > + pmm8654au_0_thermal: pm8255-0-thermal { > > + polling-delay-passive = <100>; > > Do we need the polling, is there no interrupt? Yes, we need polling. The sensors are exposed via the SCMI sensor protocol, and the SCMI server on SA8255P doesn't seem to support trip points. Also on the kernel side, scmi-hwmon driver implements only .get_temp for the thermal zone and doesn't handle trip-point events either. So polling is the only way to evaluate the trips. > > [...] > > > > +&pcie0_ep { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pcie0_ep_clkreq_default &pcie0_ep_perst_default > > + &pcie0_ep_wake_default>; > > + reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; > > + wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; > > This GPIO reference feels like a layering violation - the previous > commit promised TLMM is abstracted away I will reword commit message of patch 5 to clarify that kernel-controlled TLMM GPIOs are not abstracted by firmware. Shawn