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[91.89.5.24]) by smtp.gmail.com with UTF8SMTPSA id 5b1f17b1804b1-4bb571cfa2esm25586955e9.2.2026.11.12.22.25.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Nov 2026 22:25:02 -0800 (PST) Date: Fri, 13 Nov 2026 07:25:01 +0100 From: Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= To: Gabriel Fernandez Cc: Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Christophe Roullier , Dario Binacchi , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/5] clk: stm32: Add STM32MP25 SYSCFG clock driver Message-ID: References: <20261110-ups_mp25_clk_syscfg-v1-0-667829cd290a@foss.st.com> <20261110-ups_mp25_clk_syscfg-v1-3-667829cd290a@foss.st.com> X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="ekj7jpy4oarwkme4" Content-Disposition: inline In-Reply-To: <20261110-ups_mp25_clk_syscfg-v1-3-667829cd290a@foss.st.com> --ekj7jpy4oarwkme4 Content-Type: text/plain; protected-headers=v1; charset=us-ascii Content-Disposition: inline Subject: Re: [PATCH 3/5] clk: stm32: Add STM32MP25 SYSCFG clock driver MIME-Version: 1.0 On Tue, Nov 10, 2026 at 11:42:18AM +0100, Gabriel Fernandez wrote: > +#include > [...] > +#include Please don't add . of_device_id is already provided (with less dependencies) by . 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