Re: [PATCH] arm64: dts: altera: socfpga_stratix10: move clocks out of soc node

[Dinh Nguyen <dinguyen@kernel.org>]

Hi

On 6/23/22 11:16, Dinh Nguyen wrote:
> 
> 
> On 6/22/22 21:42, niravkumar.l.rabara@intel.com wrote:
>> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>>
>> The clocks are not part of the SoC but provided on the board
>> (external oscillators). Moving them out of soc node.
>>
>> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>> ---
>>   .../boot/dts/altera/socfpga_stratix10.dtsi    | 56 +++++++++----------
>>   1 file changed, 28 insertions(+), 28 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi 
>> b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>> index aa2bba75265f..5c7d926d18f7 100644
>> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>> @@ -97,6 +97,34 @@ intc: interrupt-controller@fffc1000 {
>>                 <0x0 0xfffc6000 0x0 0x2000>;
>>       };
>> +    clocks {
>> +        cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
>> +            #clock-cells = <0>;
>> +            compatible = "fixed-clock";
>> +        };
>> +
>> +        cb_intosc_ls_clk: cb-intosc-ls-clk {
>> +            #clock-cells = <0>;
>> +            compatible = "fixed-clock";
>> +        };
>> +
>> +        f2s_free_clk: f2s-free-clk {
>> +            #clock-cells = <0>;
>> +            compatible = "fixed-clock";
>> +        };
>> +
>> +        osc1: osc1 {
>> +            #clock-cells = <0>;
>> +            compatible = "fixed-clock";
>> +        };
>> +
>> +        qspi_clk: qspi-clk {
>> +            #clock-cells = <0>;
>> +            compatible = "fixed-clock";
>> +            clock-frequency = <200000000>;
>> +        };
>> +    };
>> +
>>       soc {
>>           #address-cells = <1>;
>>           #size-cells = <1>;
>> @@ -119,34 +147,6 @@ clkmgr: clock-controller@ffd10000 {
>>               #clock-cells = <1>;
>>           };
>> -        clocks {
>> -            cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
>> -                #clock-cells = <0>;
>> -                compatible = "fixed-clock";
>> -            };
>> -
>> -            cb_intosc_ls_clk: cb-intosc-ls-clk {
>> -                #clock-cells = <0>;
>> -                compatible = "fixed-clock";
>> -            };
>> -
>> -            f2s_free_clk: f2s-free-clk {
>> -                #clock-cells = <0>;
>> -                compatible = "fixed-clock";
>> -            };
>> -
>> -            osc1: osc1 {
>> -                #clock-cells = <0>;
>> -                compatible = "fixed-clock";
>> -            };
>> -
>> -            qspi_clk: qspi-clk {
>> -                #clock-cells = <0>;
>> -                compatible = "fixed-clock";
>> -                clock-frequency = <200000000>;
>> -            };
>> -        };
>> -
>>           gmac0: ethernet@ff800000 {
>>               compatible = "altr,socfpga-stmmac-a10-s10", 
>> "snps,dwmac-3.74a", "snps,dwmac";
>>               reg = <0xff800000 0x2000>;
> 
> NAK! This patch breaks the Stratix10 boot. Also these clocks are part of 
> the SoC!
> 

Take that back. Your changes are fine, but you need to update the board 
files as well. i.e socfpga_stratix10_socdk.dts


--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -52,12 +52,6 @@ ref_033v: regulator-v-ref {
         };

         soc {
-               clocks {
-                       osc1 {
-                               clock-frequency = <25000000>;
-                       };
-               };
-
                 eccmgr {
                         sdmmca-ecc@ff8c8c00 {
                                 compatible = "altr,socfpga-s10-sdmmc-ecc",
@@ -113,6 +107,10 @@ &mmc {
         bus-width = <4>;
  };

+&osc1 {
+       clock-frequency = <25000000>;
+};
+

Dinh