Re: [PATCH 2/2] arm64: dts: qcom: sm8550: Additionally manage MXC power domain in camcc

Taniya Das
2025-03-13T04:39:18Z

On 3/4/2025 2:10 PM, Dmitry Baryshkov wrote:
> On Tue, 4 Mar 2025 at 09:37, Vladimir Zapolskiy
> <vladimir.zapolskiy@linaro.org> wrote:
>>
>> On 3/4/25 01:53, Dmitry Baryshkov wrote:
>>> On Tue, Mar 04, 2025 at 12:55:21AM +0200, Vladimir Zapolskiy wrote:
>>>> SM8550 Camera Clock Controller shall enable both MXC and MMCX power
>>>> domains.
>>>
>>> Are those really required to access the registers of the cammcc? Or is
>>> one of those (MXC?) required to setup PLLs? Also, is this applicable
>>> only to sm8550 or to other similar clock controllers?
>>
>> Due to the described problem I experience a fatal CPU stall on SM8550-QRD,
>> not on any SM8450 or SM8650 powered board for instance, however it does
>> not exclude an option that the problem has to be fixed for other clock
>> controllers, but it's Qualcomm to confirm any other touched platforms,
>
> Please work with Taniya to identify used power domains.
>

CAMCC requires both MMCX and MXC to be functional.

>> for instance x1e80100-camcc has it resolved right at the beginning.
>>
>> To my understanding here 'required-opps' shall also be generalized, so
>> the done copy from x1e80100-camcc was improper, and the latter dt-binding
>> should be fixed.
>
> Yes
>

required-opps is not mandatory for MXC as we ensure that MxC would never
hit retention.

https://lore.kernel.org/r/20240625-avoid_mxc_retention-v2-1-af9c2f549a5f@quicinc.com

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