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[82.66.176.246]) by smtp.gmail.com with ESMTPSA id a5-20020adffb85000000b00313e4d02be8sm3763868wrr.55.2023.07.07.00.50.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 07 Jul 2023 00:50:11 -0700 (PDT) Message-ID: Date: Fri, 7 Jul 2023 09:50:10 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 From: Neil Armstrong Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH V2 3/4] soc: c3: Add support for power domains controller Content-Language: en-US To: Xianwei Zhao , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kevin Hilman References: <20230707003710.2667989-1-xianwei.zhao@amlogic.com> <20230707003710.2667989-4-xianwei.zhao@amlogic.com> Organization: Linaro Developer Services In-Reply-To: <20230707003710.2667989-4-xianwei.zhao@amlogic.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 07/07/2023 02:37, Xianwei Zhao wrote: > Add support for C3 Power controller. C3 power control > registers are in secure domain, and should be accessed by SMC. > > Signed-off-by: Xianwei Zhao > --- > V1 -> V2: Fixed some formatting. > --- > drivers/soc/amlogic/meson-secure-pwrc.c | 26 +++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/drivers/soc/amlogic/meson-secure-pwrc.c b/drivers/soc/amlogic/meson-secure-pwrc.c > index c11d65a3e3d9..a1ffebf70de3 100644 > --- a/drivers/soc/amlogic/meson-secure-pwrc.c > +++ b/drivers/soc/amlogic/meson-secure-pwrc.c > @@ -11,6 +11,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -120,6 +121,22 @@ static struct meson_secure_pwrc_domain_desc a1_pwrc_domains[] = { > SEC_PD(RSA, 0), > }; > > +static struct meson_secure_pwrc_domain_desc c3_pwrc_domains[] = { > + SEC_PD(C3_NNA, 0), > + SEC_PD(C3_AUDIO, GENPD_FLAG_ALWAYS_ON), > + SEC_PD(C3_SDIOA, GENPD_FLAG_ALWAYS_ON), > + SEC_PD(C3_EMMC, GENPD_FLAG_ALWAYS_ON), > + SEC_PD(C3_USB_COMB, GENPD_FLAG_ALWAYS_ON), > + SEC_PD(C3_SDCARD, GENPD_FLAG_ALWAYS_ON), > + SEC_PD(C3_ETH, GENPD_FLAG_ALWAYS_ON), > + SEC_PD(C3_GE2D, GENPD_FLAG_ALWAYS_ON), > + SEC_PD(C3_CVE, GENPD_FLAG_ALWAYS_ON), > + SEC_PD(C3_GDC_WRAP, GENPD_FLAG_ALWAYS_ON), > + SEC_PD(C3_ISP_TOP, GENPD_FLAG_ALWAYS_ON), > + SEC_PD(C3_MIPI_ISP_WRAP, GENPD_FLAG_ALWAYS_ON), > + SEC_PD(C3_VCODEC, 0), > +}; > + > static struct meson_secure_pwrc_domain_desc s4_pwrc_domains[] = { > SEC_PD(S4_DOS_HEVC, 0), > SEC_PD(S4_DOS_VDEC, 0), > @@ -202,6 +219,11 @@ static struct meson_secure_pwrc_domain_data meson_secure_a1_pwrc_data = { > .count = ARRAY_SIZE(a1_pwrc_domains), > }; > > +static struct meson_secure_pwrc_domain_data amlogic_secure_c3_pwrc_data = { > + .domains = c3_pwrc_domains, > + .count = ARRAY_SIZE(c3_pwrc_domains), > +}; > + > static struct meson_secure_pwrc_domain_data meson_secure_s4_pwrc_data = { > .domains = s4_pwrc_domains, > .count = ARRAY_SIZE(s4_pwrc_domains), > @@ -212,6 +234,10 @@ static const struct of_device_id meson_secure_pwrc_match_table[] = { > .compatible = "amlogic,meson-a1-pwrc", > .data = &meson_secure_a1_pwrc_data, > }, > + { > + .compatible = "amlogic,c3-pwrc", > + .data = &amlogic_secure_c3_pwrc_data, > + }, > { > .compatible = "amlogic,meson-s4-pwrc", > .data = &meson_secure_s4_pwrc_data, Reviewed-by: Neil Armstrong