From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED54C4A04; Tue, 4 Jun 2024 01:51:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717465894; cv=none; b=RdpWuNZBPQ8n18aw4a0nyqwqUuXj7RzhEEWVdIeUQ27GrPDGqpxufgt2udbX6KRtBkCevsUdUAK6aARkNCD+VmWfr2q6Fv2+z9qKyvTg5U37hfWVF4rZye6TCPOS3QZuoo2/AVnPk1xLe39vyEDJTg9FVBMsLCrBVLbY2tYuVcU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717465894; c=relaxed/simple; bh=dEPv1dYC3IoPhn6DAU+v5jT+Lv/0U5BtbLurTzGUu1k=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=WAzcGmZm5aFbjWDzOrLSZ1oShNIPBEPSfkkk4l9PoRkJShk3zuwFOQ/SHTowTEoXxK8yZ+GN7wO4ixhMxuNcyLq7bCCbzPBzd9jpb3X/IxR9RLt4iiS0/6u4WYLXsfgN8Swr44+b6ka6MnYX9Z4+Cpdjl5v6gB5YYaoay9HLwTo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ilIRnfCX; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ilIRnfCX" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 647E2C2BD10; Tue, 4 Jun 2024 01:51:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717465893; bh=dEPv1dYC3IoPhn6DAU+v5jT+Lv/0U5BtbLurTzGUu1k=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=ilIRnfCX2IMfOHYc9qygVQ7gs3ZJHi1xvtlDsULEKrGRSQcNVgAWPpKa8u9Yznb+4 ZrHy0Hgf6z26Oh10/wXCBY0XMeZS4UbeoQ8/02iUccl+Kv7pdck5c2dMF1p/77JLv4 SF0sGw26WeOtqgOKwKm3jJYgI+kUJG/EemC3ohi3WWLqv1j755c2FSG2eueA6nHt4o lSoxP+YDI5Aw96mwq2q5JqmdxLdV9GBfqVaxRNhd9MBu7Y20HRUEwx9T4ksjCWCHO1 oukzoMq28Z12OUqyjVOg7N8pMfE8B1C+JJEuZkMlmIMuLDyM2fmLhKgzG0JTGL47aN /emSPme8p9eew== Message-ID: Date: Tue, 4 Jun 2024 10:51:30 +0900 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 00/13] PCI: dw-rockchip: Add endpoint mode support To: Kever Yang , Niklas Cassel , Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kishon Vijay Abraham I , Arnd Bergmann , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org References: <20240529-rockchip-pcie-ep-v1-v4-0-3dc00fe21a78@kernel.org> <05b1bfa3-4284-4820-b0f6-124e08088456@rock-chips.com> From: Damien Le Moal Content-Language: en-US Organization: Western Digital Research In-Reply-To: <05b1bfa3-4284-4820-b0f6-124e08088456@rock-chips.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 6/4/24 10:45, Kever Yang wrote: > Hi Niklas, > > On 2024/5/29 16:28, Niklas Cassel wrote: >> Hello all, >> >> This series adds PCIe endpoint mode support for the rockchip rk3588 and >> rk3568 SoCs. >> >> This series is based on: pci/next >> (git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git) >> >> This series can also be found in git: >> https://github.com/floatious/linux/commits/rockchip-pcie-ep-v4 >> >> Testing done: >> This series has been tested with two rock5b:s, one running in RC mode and >> one running in EP mode. This series has also been tested with an Intel x86 >> host and rock5b running in EP mode. > > I'm interesting how you test in Intel x86 host, PC scan the PCIe device > in BIOS, do you > > power on the EP before PC power on? Yes. Same with any host, not just x86. -- Damien Le Moal Western Digital Research