[PATCH v2 0/9] spi: zynqmp-gqspi: Support multiple buses and add GPIO support

[PATCH v2 0/9] spi: zynqmp-gqspi: Support multiple buses and add GPIO support

[Sean Anderson]

This device really has two SPI buses but they are currently determined
by the slave's CS. Decouple bus selection from CS, and add support for
GPIO chipselects. This allows adding arbitrary devices on either bus.

This version does the bus selction using a spi-buses property in
slaves's node, as opposed to having separate nodes for the upper and
lower buses. This should be backwards compatible with existing bindings,
and could allow supporting "parallel" memories in the future (identical
flashes on both buses controlled in lockstep).

Changes in v2:
- Add spi-buses property
- Update spi-zynqmp-qspi.yaml with new binding style
- Support multi-bus controllers
- Add flag to determine default bus
- Support multiple buses with spi-buses instead of explicit
  upper/lower/merged buses

David Lechner (2):
  dt-bindings: spi: Add spi-buses property
  spi: Support multi-bus controllers

Sean Anderson (7):
  dt-bindings: spi: zynqmp-qspi: Add example dual upper/lower bus
  spi: Add flag to determine default bus
  spi: zynqmp-gqspi: Support multiple buses
  spi: zynqmp-gqspi: Pass speed directly to config_op
  spi: zynqmp-gqspi: Configure SPI mode dynamically
  spi: zynqmp-gqspi: Support GPIO chip selects
  ARM64: xilinx: zynqmp: Add spi-buses property

 .../bindings/spi/spi-peripheral-props.yaml    |  10 ++
 .../bindings/spi/spi-zynqmp-qspi.yaml         |  22 ++-
 .../boot/dts/xilinx/zynqmp-sm-k26-revA.dts    |   1 +
 .../boot/dts/xilinx/zynqmp-zc1254-revA.dts    |   1 +
 .../dts/xilinx/zynqmp-zc1751-xm015-dc1.dts    |   1 +
 .../dts/xilinx/zynqmp-zc1751-xm018-dc4.dts    |   1 +
 .../boot/dts/xilinx/zynqmp-zcu102-revA.dts    |   1 +
 .../boot/dts/xilinx/zynqmp-zcu104-revA.dts    |   1 +
 .../boot/dts/xilinx/zynqmp-zcu104-revC.dts    |   1 +
 .../boot/dts/xilinx/zynqmp-zcu106-revA.dts    |   1 +
 .../boot/dts/xilinx/zynqmp-zcu111-revA.dts    |   1 +
 .../boot/dts/xilinx/zynqmp-zcu1275-revA.dts   |   1 +
 drivers/spi/spi-zynqmp-gqspi.c                | 155 ++++++++++++++----
 drivers/spi/spi.c                             |  31 +++-
 include/linux/spi/spi.h                       |  15 ++
 15 files changed, 208 insertions(+), 35 deletions(-)

-- 
2.35.1.1320.gc452695387.dirty

[PATCH v2 2/9] dt-bindings: spi: zynqmp-qspi: Add example dual upper/lower bus

[Sean Anderson]

Add an example of the spi-buses property showcasing how to have devices
on both the upper and lower buses.

Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
---

Changes in v2:
- New

 .../bindings/spi/spi-zynqmp-qspi.yaml         | 22 ++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
index 02cf1314367b..c6a57fbb9dcf 100644
--- a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
@@ -69,7 +69,7 @@ examples:
       #address-cells = <2>;
       #size-cells = <2>;
 
-      qspi: spi@ff0f0000 {
+      qspi: spi-controller@ff0f0000 {
         compatible = "xlnx,zynqmp-qspi-1.0";
         clocks = <&zynqmp_clk 53>, <&zynqmp_clk 82>;
         clock-names = "ref_clk", "pclk";
@@ -77,5 +77,25 @@ examples:
         interrupt-parent = <&gic>;
         reg = <0x0 0xff0f0000 0x0 0x1000>,
               <0x0 0xc0000000 0x0 0x8000000>;
+        num-cs = <3>;
+        cs-gpios = <0>, <0>, <&gpio 5>;
+
+        flash@0 {
+          reg = <0>;
+          spi-buses = <0>;
+          compatible = "jedec,spi-nor";
+        };
+
+        flash@1 {
+          reg = <1>;
+          spi-buses = <1>;
+          compatible = "jedec,spi-nor";
+        };
+
+        flash@2 {
+          reg = <2>;
+          spi-buses = <0>;
+          compatible = "jedec,spi-nor";
+        };
       };
     };
-- 
2.35.1.1320.gc452695387.dirty

[PATCH v2 9/9] ARM64: xilinx: zynqmp: Add spi-buses property

[Sean Anderson]

Add the spi-buses property to the ZynqMP devicetrees. This is pretty
simple, since all boards use the lower bus.

Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
---

(no changes since v1)

 arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts      | 1 +
 arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts      | 1 +
 arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts | 1 +
 arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts | 1 +
 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts      | 1 +
 arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts      | 1 +
 arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts      | 1 +
 arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts      | 1 +
 arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts      | 1 +
 arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts     | 1 +
 10 files changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
index bfa7ea6b9224..3d3cb656f38c 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
@@ -132,6 +132,7 @@ &qspi { /* MIO 0-5 - U143 */
 	spi_flash: flash@0 { /* MT25QU512A */
 		compatible = "jedec,spi-nor"; /* 64MB */
 		reg = <0>;
+		spi-buses = <0>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>;
 		spi-max-frequency = <40000000>; /* 40MHz */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
index 3dec57cf18be..f550ccea58cd 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
@@ -45,6 +45,7 @@ flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
+		spi-buses = <0>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
 		spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
index 6aff22d43361..4ad5efdd40cd 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
@@ -359,6 +359,7 @@ flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
+		spi-buses = <0>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>;
 		spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
index 6ec1d9813973..26c33685b320 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
@@ -177,6 +177,7 @@ flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
+		spi-buses = <0>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>; /* also DUAL configuration possible */
 		spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
index 7e26489a1539..aa4ed3a082fa 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
@@ -958,6 +958,7 @@ flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
+		spi-buses = <0>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
 		spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
index eb2090673ec1..acbe0758a31b 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
@@ -444,6 +444,7 @@ flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
+		spi-buses = <0>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>;
 		spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
index 4694d0a841f1..9b0324acbeec 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
@@ -456,6 +456,7 @@ flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
+		spi-buses = <0>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>;
 		spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
index 7beedd730f94..fd983f4c416d 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
@@ -964,6 +964,7 @@ flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
+		spi-buses = <0>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
 		spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
index b67ff7ecf3c3..af225413a274 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
@@ -794,6 +794,7 @@ flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
+		spi-buses = <0>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
 		spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts
index a38c2baeba6c..65790e341c15 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts
@@ -47,6 +47,7 @@ &qspi {
 	flash@0 {
 		compatible = "m25p80", "jedec,spi-nor";
 		reg = <0x0>;
+		spi-buses = <0>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>;
 		spi-max-frequency = <108000000>;
-- 
2.35.1.1320.gc452695387.dirty

Re: [PATCH v2 2/9] dt-bindings: spi: zynqmp-qspi: Add example dual upper/lower bus

[Rob Herring (Arm)]

On Mon, 16 Jun 2025 18:00:47 -0400, Sean Anderson wrote:
> Add an example of the spi-buses property showcasing how to have devices
> on both the upper and lower buses.
> 
> Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
> ---
> 
> Changes in v2:
> - New
> 
>  .../bindings/spi/spi-zynqmp-qspi.yaml         | 22 ++++++++++++++++++-
>  1 file changed, 21 insertions(+), 1 deletion(-)
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dts:40.15-25: Warning (reg_format): /example-0/soc/spi-controller@ff0f0000/flash@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dts:46.15-25: Warning (reg_format): /example-0/soc/spi-controller@ff0f0000/flash@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dts:52.15-25: Warning (reg_format): /example-0/soc/spi-controller@ff0f0000/flash@2:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dtb: Warning (pci_device_reg): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dtb: Warning (simple_bus_reg): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dts:39.21-43.15: Warning (avoid_default_addr_size): /example-0/soc/spi-controller@ff0f0000/flash@0: Relying on default #address-cells value
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dts:39.21-43.15: Warning (avoid_default_addr_size): /example-0/soc/spi-controller@ff0f0000/flash@0: Relying on default #size-cells value
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dts:45.21-49.15: Warning (avoid_default_addr_size): /example-0/soc/spi-controller@ff0f0000/flash@1: Relying on default #address-cells value
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dts:45.21-49.15: Warning (avoid_default_addr_size): /example-0/soc/spi-controller@ff0f0000/flash@1: Relying on default #size-cells value
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dts:51.21-55.15: Warning (avoid_default_addr_size): /example-0/soc/spi-controller@ff0f0000/flash@2: Relying on default #address-cells value
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dts:51.21-55.15: Warning (avoid_default_addr_size): /example-0/soc/spi-controller@ff0f0000/flash@2: Relying on default #size-cells value
Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dtb: Warning (unique_unit_address_if_enabled): Failed prerequisite 'avoid_default_addr_size'
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dtb: spi-controller@ff0f0000 (xlnx,zynqmp-qspi-1.0): $nodename:0: 'spi-controller@ff0f0000' does not match '^spi(@.*|-([0-9]|[1-9][0-9]+))?$'
	from schema $id: http://devicetree.org/schemas/spi/spi-zynqmp-qspi.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.example.dtb: spi-controller@ff0f0000 (xlnx,zynqmp-qspi-1.0): Unevaluated properties are not allowed ('cs-gpios', 'flash@0', 'flash@1', 'flash@2', 'num-cs' were unexpected)
	from schema $id: http://devicetree.org/schemas/spi/spi-zynqmp-qspi.yaml#

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250616220054.3968946-3-sean.anderson@linux.dev

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Re: [PATCH v2 9/9] ARM64: xilinx: zynqmp: Add spi-buses property

[Krzysztof Kozlowski]

On 17/06/2025 00:00, Sean Anderson wrote:
> Add the spi-buses property to the ZynqMP devicetrees. This is pretty
> simple, since all boards use the lower bus.
> 
> Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
> ---
> 
> (no changes since v1)
> 
>  arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts      | 1 +
>  arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts      | 1 +
>  arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts | 1 +
>  arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts | 1 +
>  arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts      | 1 +
>  arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts      | 1 +
>  arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts      | 1 +
>  arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts      | 1 +
>  arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts      | 1 +
>  arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts     | 1 +
>  10 files changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
> index bfa7ea6b9224..3d3cb656f38c 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
> @@ -132,6 +132,7 @@ &qspi { /* MIO 0-5 - U143 */
>  	spi_flash: flash@0 { /* MT25QU512A */
>  		compatible = "jedec,spi-nor"; /* 64MB */
>  		reg = <0>;
> +		spi-buses = <0>;

Default is 0, so this entire patch is noop. Commit msg should explain
that if noop is still needed for any reason.

Best regards,
Krzysztof

Re: [PATCH v2 2/9] dt-bindings: spi: zynqmp-qspi: Add example dual upper/lower bus

[David Lechner]

On 6/16/25 5:00 PM, Sean Anderson wrote:
> Add an example of the spi-buses property showcasing how to have devices
> on both the upper and lower buses.
> 
> Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
> ---
> 
> Changes in v2:
> - New
> 
>  .../bindings/spi/spi-zynqmp-qspi.yaml         | 22 ++++++++++++++++++-
>  1 file changed, 21 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
> index 02cf1314367b..c6a57fbb9dcf 100644
> --- a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
> +++ b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml


In addition to changing the example, we could also extend the
spi-buses property for this controller since we know this controller
has 2 buses.

  properties:
    ...

    spi-buses:
      description: 0 is the "lower" bus, 1 is the "upper" bus
      maxItems: 2
      items:
        enum: [0, 1]

Not sure what to do about the default though since as discussed elsewhere,
this controller needs the default bus number to be the CS number for
backwards compatibility rather than `default: [0]` as is specified in the
previous patch.

I suppose we could leave default out of the generic binding and leave it
up to each individual controller to decide how to handle that.

> @@ -69,7 +69,7 @@ examples:
>        #address-cells = <2>;
>        #size-cells = <2>;
>  
> -      qspi: spi@ff0f0000 {
> +      qspi: spi-controller@ff0f0000 {

It seems more common to have spi@ rather than spi-controller@.
Is there a push to change this in general?

>          compatible = "xlnx,zynqmp-qspi-1.0";
>          clocks = <&zynqmp_clk 53>, <&zynqmp_clk 82>;
>          clock-names = "ref_clk", "pclk";

Re: [PATCH v2 2/9] dt-bindings: spi: zynqmp-qspi: Add example dual upper/lower bus

[Sean Anderson]

On 6/18/25 14:27, David Lechner wrote:
> On 6/16/25 5:00 PM, Sean Anderson wrote:
>> Add an example of the spi-buses property showcasing how to have devices
>> on both the upper and lower buses.
>> 
>> Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
>> ---
>> 
>> Changes in v2:
>> - New
>> 
>>  .../bindings/spi/spi-zynqmp-qspi.yaml         | 22 ++++++++++++++++++-
>>  1 file changed, 21 insertions(+), 1 deletion(-)
>> 
>> diff --git a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
>> index 02cf1314367b..c6a57fbb9dcf 100644
>> --- a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
>> +++ b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
> 
> 
> In addition to changing the example, we could also extend the
> spi-buses property for this controller since we know this controller
> has 2 buses.
> 
>   properties:
>     ...
> 

OK, but this property is for the slaves not the master. I'm not sure what the right incantation is.

>     spi-buses:
>       description: 0 is the "lower" bus, 1 is the "upper" bus
>       maxItems: 2
>       items:
>         enum: [0, 1]
> 
> Not sure what to do about the default though since as discussed elsewhere,
> this controller needs the default bus number to be the CS number for
> backwards compatibility rather than `default: [0]` as is specified in the
> previous patch.
> 
> I suppose we could leave default out of the generic binding and leave it
> up to each individual controller to decide how to handle that.
> 
>> @@ -69,7 +69,7 @@ examples:
>>        #address-cells = <2>;
>>        #size-cells = <2>;
>>  
>> -      qspi: spi@ff0f0000 {
>> +      qspi: spi-controller@ff0f0000 {
> 
> It seems more common to have spi@ rather than spi-controller@.
> Is there a push to change this in general?

iirc I got a warning when running dt_binding_check. I can re-test this...

--Sean

Re: [PATCH v2 2/9] dt-bindings: spi: zynqmp-qspi: Add example dual upper/lower bus

[David Lechner]

On 6/19/25 11:20 AM, Sean Anderson wrote:
> On 6/18/25 14:27, David Lechner wrote:
>> On 6/16/25 5:00 PM, Sean Anderson wrote:
>>> Add an example of the spi-buses property showcasing how to have devices
>>> on both the upper and lower buses.
>>>
>>> Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
>>> ---
>>>
>>> Changes in v2:
>>> - New
>>>
>>>  .../bindings/spi/spi-zynqmp-qspi.yaml         | 22 ++++++++++++++++++-
>>>  1 file changed, 21 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
>>> index 02cf1314367b..c6a57fbb9dcf 100644
>>> --- a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
>>> +++ b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
>>
>>
>> In addition to changing the example, we could also extend the
>> spi-buses property for this controller since we know this controller
>> has 2 buses.
>>
>>   properties:
>>     ...
>>
> 
> OK, but this property is for the slaves not the master. I'm not sure what the right incantation is.


I think using patternProperties, like in Documentation/devicetree/
bindings/spi/spi-controller.yaml

patternProperties:
  "^.*@[01]$":
    spi-buses:
      ...

> 
>>     spi-buses:
>>       description: 0 is the "lower" bus, 1 is the "upper" bus
>>       maxItems: 2
>>       items:
>>         enum: [0, 1]
>>